The Motorola 68020 is a microprocessor from Motorola. It is the successor to the Motorola 68010 and is succeeded by the Motorola 68030.

The 68020 had 32-bit internal and external data and address buses. A lower cost version, the 68EC020, only had a 24-bit address bus.

The 68020 added many improvements to the 68010 including a 32-bit arithmetic and logical unit (ALU) and external data bus and address bus, and new instrucitons and addressing modes. The 68020 (and 68030) had a proper three-stage pipeline.

The Motorola multiprocessing model was added with the 68020. This allowed up to eight processors per system to co-operate, these eight could be any number of CPUs, FPUs but a single MMU (either a 68841 or 68851). This had some limitation, as each CPU used had to be the same model (not necessarily the same clock) and each FPU has to be the same model (again, not necessarily the same clock) so multiprocessing a 68020/25 with a 68030/25 was not allowed (the 020, for example, could not be aware of the 030's internal MMU) but a 68020/25 with a 68882/33 was perfectly acceptable and quite common. It was, however, extremely uncommon to see more than one CPU or FPU in the same system. Most UNIX boxes made with 68020s were simply the '020, an FPU (68881 or 68882) and an MMU (68841 or 68851).

The new instructions included some minor improvements and extensions to the supervisor state, several instructions for software management of a multiprocessing system (which were removed in the 68060), some support for high-level languages which did not get used much (and was removed from future 680x0 processors), bigger (32 x 32-bit) multiply and divide instructions, and bit field manipulations.

The new adderessing modes added another level of indirection to many of the pre-existing modes, and added quite a bit of flexibility to various indexing modes and operations. Though it was not intended, these new modes made the 68020 very suitable for page printing; Most laser printers in the early '90s had a 68EC020 at their core.

The instruction buffer (an instruction cache) was 256 bytes, arranged as 64 direct-mapped 4-byte entries. Although small, it made a significant difference in the performance of many applications.

The 68020 was used in many models of the Amiga and Apple Macintosh II series of personal computers and Sun 3 workstations.

For more information on the instructions and architecture see Motorola 68000.

References

External links

• 68020 images and descriptions at cpu-collection.de (http://www.cpu-collection.de/?tn=1&l0=cl&l1=68020)