The 45 nanometer (45 nm) process is the next milestone (to be commercially viable in mid 2007 to early 2008) in CMOS fabrication. Intel is targeting 45 nm production in late 2007, and Intel, IBM, Infineon, Samsung, Chartered Semiconductor, Toshiba, and Sony have completed a common 45 nm process. Static CMOS Inverter Complementary-symmetry/metal-oxide semiconductor (CMOS) (see-moss, IPA:), is a major class of integrated circuits. ... The DEC Alpha 21264A used the 250 nm CMOS process, and was made commercially available in 1999. ... The 180 nanometer (180 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 90 nm node refers to the level of semiconductor process technology that was reached in the 2002-2003 timeframe, by most leading semiconductor companies, like Intel, Texas Instruments, IBM, and TSMC. The origin of the 90 nm value is historical, as it represents a 70% scaling every 2-3... The 65 nanometer (65 nm) process is (as of 2006) the most advanced lithographic node for volume semiconductor manufacturing, however it will soon be eclipsed when 45 nanometer lithography becomes commercially viable. ... The 32 nanometer (32 nm) process is the next step after the 45 nanometer process in semiconductor manufacturing and fabrication. ... The 22 nanometer (22 nm) node is the technology node following 32 nm node. ... The 16 nanometer (16 nm) node is the technology node following 22 nm node. ... The metre, or meter (U.S.), is a measure of length. ... Static CMOS Inverter Complementary-symmetry/metal-oxide semiconductor (CMOS) (see-moss, IPA:), is a major class of integrated circuits. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... International Business Machines Corporation (known as IBM or Big Blue; NYSE: IBM) is a multinational computer technology corporation headquartered in Armonk, New York, USA. The company is one of the few information technology companies with a continuous history dating back to the 19th century. ... Infineon Technologies is a German manufacturer of integrated circuits and related products. ... Samsung Group is one of the largest South Korean business groupings. ... Chartered Semiconductor Manufacturing SGX: C27 NASDAQ: CHRT (abbreviated CSM) is the worlds fourth largest dedicated independent semiconductor foundry, with its headquarters and main operations located in the Woodlands Industrial Park, Kranji Singapore. ... Toshiba Corporations headquarters in Hamamatsucho, Tokyo Toshiba Corporation sales by division for year ending March, 31 2005 Toshiba Corporation ) (TYO: 6502 ) is a Japanese high technology electrical and electronics manufacturing firm, headquartered in Tokyo, Japan. ... To meet Wikipedias quality standards, this article or section may require cleanup. ...

Per ITRS, the 45 nm technology node should have significantly tighter specs than the current 65 nm node. '45 nm' itself should refer to the average half-pitch of a memory cell manufactured at that technology level. The 65 nanometer (65 nm) process is the next milestone as of 2005 in semiconductor manufacturing and fabrication. ...

While average feature sizes are less than 65 nm, the wavelength of light used is actually 193 nm. A variety of techniques, such as larger lenses, are used to make sub-wavelength features. Double patterning may also be introduced to assist in shrinking distances between features, especially if dry lithography is used. Multiple patterning is an extension of double patterning, a class of technologies developed for photolithography to enhance the feature density. ... Photolithography is a process used in semiconductor device fabrication to transfer a pattern from a photomask (also called reticle) to the surface of a substrate. ...

Intel stated in 2003 that high-k gate dielectrics may be introduced at the 45 nm node to reduce gate leakage current. However, chipmakers have since then voiced concerns about introducing these new materials into the gate stack. A dielectric, or electrical insulator, is a substance that is highly resistant to electric current. ...

Technology demos

• Intel demonstrated a 0.346 square micrometers 45 nm node SRAM cell in January 2006, a respective 39% and 65% area reduction compared to its previous 65 nm and 90 nm SRAM cell demonstrations (0.57 and 1.0 square micrometers, respectively). For 65 and 45 nm nodes, the average pitch of an Intel SRAM feature is related to SRAM cell area by cell area = 10*(pitch)², corresponding to 2 gate pitches * 5 active isolation pitches. However, based on reports at IEDM in the past few years, in going from the 90 nm to 65 nm logic process, the minimum pitch changed only 5%. Minimum pitch does not directly correlate to area, as feature lengths may also shrink, and the overall chip area can be reduced by crowding more transistors at the minimum distance. This also means that logic process technology may not depend so critically on improving the nanolithography technique (which is really used for reducing the minimum pitch).

• In 2004, TSMC demonstrated a 0.296 square micrometer 45 nm SRAM cell.

• In April 2006, AMD demonstrated a 0.370 square micrometer 45 nm SRAM cell.

• In June 2006, Texas Instruments debuted a 0.24 square micrometer 45 nm SRAM cell, with the help of immersion lithography.

• In November 2006, UMC announced that it had developed a 45 nm SRAM chip with a cell size of less than 0.25 square micrometer using immersion lithography and low-k dielectrics.

The successors to 45 nm technology will be 32 nm, 22 nm, and then 16 nm technology per ITRS. A six-transistor CMOS SRAM cell. ... Since 2002 and up to 2004, the 90 nanometer (90 nm) process has been a buzzword in the electronic, the LSI and semiconductor manufacturing, and fabrication industries. ... The 65 nanometer (65 nm) process is the next milestone as of 2005 in semiconductor manufacturing and fabrication. ... Nanolithography — or lithography at the nanometer scale — refers to the fabrication of nanometer-scale structures, meaning patterns with at least one lateral dimension between the size of an individual atom and approximately 100 nm. ... Taiwan Semiconductor Manufacturing Company, Limited (Traditional Chinese: 台灣積體電路製造股份有限公司, abbrev. ... AMD headquarters in Sunnyvale Advanced Micro Devices, Inc. ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... In photolithography, immersion lithography is a resolution enhancement technique that interposes a liquid medium between the optics and the wafer surface, replacing the usual air gap. ... UMC (United Microelectronics Corporation) was founded in 1980, as Taiwans first Semiconductor company. ... A Low-K dielectric is one with a small dielectric constant. ... The 32 nanometer (32 nm) process is the next step after the 45 nanometer process in semiconductor manufacturing and fabrication. ... The 22 nanometer (22 nm) node is the technology node following 32 nm node. ... The 16 nanometer (16 nm) node is the technology node following 22 nm node. ...

External links

• Intel 45 nm process is good to go
• Intel moving to 45nm sooner than expected?
• Chipmakers gear up for manufacturing hurdles
• Intel 45 nm node SRAM cell
• An AMD Update
• Slashdot discussion