Atmel AVR ATmega8 PDIP.

The AVR is a Modified Harvard architecture 8-bit RISC single chip microcontroller (µC) which was developed by Atmel in 1996. The AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to One-Time Programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time. ICs in DIP14-Package Several PDIPs and CERDIPS. The large CERDIP in the foreground is an 8080 processor. ... The Modified Harvard Architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be accessed as if it were data. ... This article does not cite any references or sources. ... It has been suggested that this article or section be merged with embedded microprocessor. ... Atmel ATMEGA32 microcontroller Atmel AT90S2333 microcontroller Atmel Corporation (NASDAQ: ATML) is a manufacturer of semiconductors, founded in 1984. ... A USB flash drive. ... D23128C PROM on the board of ZX Spectrum A programmable read-only memory (PROM) or field programmable read-only memory (FPROM) is a form of digital memory where the setting of each byte is locked by a fuse or antifuse. ... EPROM. The small quartz window admits UV light during erasure. ... An EEPROM (also called an E2PROM)[] or Electronically Erasable Programmable Read-Only Memory, is a non-volatile storage chip used in computers and other devices to store small amounts of volatile (configuration) data. ...

Brief History

It is believed the AVR basic architecture was conceived by two students at the Norwegian Institute of Technology (NTH) Alf-Egil Bogen and Vegard Wollan.^[1][2] The main building of the Norwegian Institute of Technology (NTH). ...

The original AVR MCU was developed at a local ASIC house in Trondheim Norway, where the two founders of Atmel Norway were working as students. It was known as a μRISC (Micro RISC). When the technology was sold to Atmel, the internal architecture was further developed by Alf and Vegard at Atmel Norway, a subsidiary of Atmel founded by the two architects.

The acronym AVR has been reported to stand for Advanced Virtual RISC, but it has also been rumoured to stand for the initials of the chip's designers: Alf and Vegard [RISC]. Atmel says that the name AVR is not an acronym and does not stand for anything in particular.

Note that the use of "AVR" in this article generally refers to the 8-bit RISC line of Atmel AVR Microcontrollers.

Among the first of the AVR line was the AT90S8515, which in a 40-pin DIP package has the same pinout as an 8051 microcontroller, including the external multiplexed address and data bus. The polarity of the /RESET line was opposite (8051's having an active-high RESET, while the AVR has an active-low /RESET), but other than that, the pinout was identical. Pin diagram of 40 pin Intel 8051 Microcontroller The Intel 8051 was a Harvard architecture single chip microcontroller (µC) developed by Intel in 1980 for use in embedded systems. ...

Device Overview

The AVR is a Modified Harvard architecture machine with program and data stored in separate physical memory systems that appear in different address spaces but having the ability to read data items from program memory using special instructions. The Modified Harvard Architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be accessed as if it were data. ...

Basic Families

AVRs are generally classified into four broad groups:

• tinyAVRs
  • 1-8 kB program memory
  • 8-32-pin package
  • Limited peripheral set

• megaAVRs
  • 4-256 kB program memory
  • 28-100-pin package
  • Extended instruction set (Multiply instructions and instructions for handling larger program memories)
  • Extensive peripheral set

• XMEGA
  • 16-256 kB program memory
  • 44-100-pin package
  • Extended performance features, such as DMA, "Event System", and cryptography support.
  • Extensive peripheral set with DACs

• Application specific AVRs
  • megaAVRs with special features not found on the other members of the AVR family, such as LCD controller, USB controller, advanced PWM, CAN etc.
  • FPSLIC (Field Programmable System Level Integrated Circuit), an AVR core on-die with an FPGA. The FPSLIC uses SRAM for the AVR program code, unlike all other AVRs. Partly due to the relative speed difference between SRAM and flash, the AVR core in the FPSLIC can run at up to 50MHz.

An Altera Stratix II GX FPGA. A field-programmable gate array is a semiconductor device containing programmable logic components called logic blocks, and programmable interconnects. ...

Device Architecture

Data RAM

Flash, EEPROM, and SRAM are all integrated onto a single chip, removing the need for external memory (though still available on some devices). A USB flash drive. ... An EEPROM (also called an E2PROM)[] or Electronically Erasable Programmable Read-Only Memory, is a non-volatile storage chip used in computers and other devices to store small amounts of volatile (configuration) data. ... Static random access memory (SRAM) is a type of semiconductor memory. ...

Program Memory (Flash)

Program instructions are stored in non-volatile Flash memory. Although they are 8-bit MCUs, each instruction takes one or two 16-bit words. Non-Volatile Random Access Memory (NVRAM) is a computer memory chip which will not lose its information when the power is lost. ... A USB flash drive. ...

The size of the program memory is occasionally indicated in the naming of the device itself (e.g., the ATmega64x line has 64 kB of Flash).

Internal Data Memory

The data address space consists of the register file, I/O registers, and SRAM. The AVRs have 32 single-byte registers and are classified as 8-bit RISC devices. In computing, an address space defines a range of discrete addresses, each of which may correspond to a physical or virtual memory register, a network host, peripheral device, disk sector or other logical or physical entity. ... A register file is an array of processor registers in a central processing unit (CPU). ... Static random access memory (SRAM) is a type of semiconductor memory. ... For the computer industry magazine, see Byte (magazine). ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ...

Internal Registers

The working registers are mapped in as the first 32 memory addresses (0000₁₆-001F₁₆) followed by the 64 I/O registers (0020₁₆-005F₁₆).

Actual SRAM starts after these register sections (address 0060₁₆). (Note that the I/O register space may be larger on some more extensive devices, in which case the memory mapped I/O registers will occupy a portion of the SRAM address space.) Memory-mapped I/O (MMIO) and port I/O (also called port-mapped I/O or PMIO) are two complementary methods of performing input/output between the CPU and I/O devices in a computer. ...

Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM.

EEPROM

Some AVR microcontrollers have internal Electrically Erasable Programmable Read Only Memory (EEPROM) for semi-permanent data storage (as versus FLASH for semi-permanent program storage). Like Flash memory, EEPROM can maintain its contents when electrical power is removed.

This internal EEPROM memory is not mapped into the MCU's addressable memory space. It can only be accessed the same way an external peripheral device is, using special pointer registers and read/write instructions which makes EEPROM access much slower than other internal RAM.

Since the number of writes to EEPROM is not unlimited - Atmel specifies 100,000 write cycles in their datasheets - a well designed EEPROM write routine should compare the contents of an EEPROM address with desired contents and only perform an actual write if contents need to be changed.

Program Execution

Atmel's AVRs have a three stage, single level pipeline design. This means the next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers.

The AVR family of processors were designed with the efficient execution of compiled C code in mind and has several built-in pointers for the task. A diagram of the operation of a typical multi-language, multi-target compiler. ... C is a general-purpose, block structured, procedural, imperative computer programming language developed in 1972 by Dennis Ritchie at the Bell Telephone Laboratories for use with the Unix operating system. ...

Instruction Set

Main article: Atmel AVR instruction set

The AVR Instruction Set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Here is the basic Atmel AVR instruction set. ... Here is the basic Atmel AVR instruction set. ... In mathematics, orthogonal is synonymous with perpendicular when used as a simple adjective that is not part of any longer phrase with a standard definition. ...

• Pointer registers X, Y, and Z have addressing capabilities that are different from each other.
• Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31.
• I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63.
• CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note that CLR is pseudo-op for EOR R, R; and SER is short for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.)

Pointer Register: A register in which the programmer can store the address of an operand (in assembly language). ... Register or registration may mean: Registration (or licensing) is required of a number of occupations and professions where maintenance of standards is required to protect public safety. ...

MCU Speed

The AVR line can normally support clock speeds from 0-16 MHz, with some devices reaching 32 MHz. Lower powered operation usually requires a reduced clock speed. All recent (TINY and MEGA, but not 90S) AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry.

Since many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. Million instructions per second (MIPS) is a measure of a computers processor speed. ...

Development

AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are sold under various names that share the same basic core but with different peripheral and memory combinations. Compatibility amongst chips is fairly good.

See external links for sites relating to AVR development.

Features

Current AVRs offer a wide range of features:

• Multifunction, Bi-directional General Purpose I/O ports with configurable, built-in pull-up resistors
• Multiple Internal Oscillators
• Internal, Self-Programmable Instruction Flash Memory up to 256 K
  • In-System Programmable using ISP, JTAG, or High Voltage methods
  • Optional Boot Code Section with Independent Lock Bits for Protection
• On chip debugging (OCD) support through JTAG or debugWIRE on most devices
  • The JTAG signals (TMS, TDI, TDO, and TCK) are multiplexed on GPIOs. These pins can be configured to function as JTAG or GPIO depending on the setting of a fuse bit, which can be programmed via ISP or HVSP. By default, AVRs with JTAG come with the JTAG interface enabled.
  • debugWIRE uses the /RESET pin as a bi-directional communication channel to access on-chip debug circuitry. It is present on devices with lower pin counts, as it only requires one pin. debugWIRE can only be enabled using ISP or HVSP. Once enabled, it can only be disabled via the debugWIRE interface.
• Internal Data EEPROM up to 4 kB
• Internal SRAM up to 8 K
• External 64KB little endian data space on certain models, including the Mega8515 and Mega162.
  • The external data space is overlaid with the internal data space, such that the full 64KB address space does not appear on the external bus. An accesses to e.g. address 0x0100 will access internal RAM, not the external bus.
  • AVR's generally do not support executing code from external memory. Some ASSP's using the AVR code do support external program memory.
• 8-Bit and 16-Bit Timers
  • PWM output (Dead time generator on some devices)
  • Input capture
• Analog Comparators
• 10 or 12-Bit A/D Converters, with multiplex of up to 16 channels
• 12-bit D/A Converters
• A variety of serial interfaces, including
  • I²C Compatible Two-Wire Interface (TWI)
  • Synchronous/Asynchronous Serial Peripherals (UART/USART) (used with RS-232, RS-485, and more)
  • Serial Peripheral Interface Bus (SPI)
  • Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer
• Brownout Detection
• Watchdog Timer (WDT)
• Multiple Power-Saving Sleep Modes
• Lighting and motor control (PWM Specific) Controller models
• CAN Controller Support
• USB Controller Support
  • Proper High-speed hardware & Hub controller with embedded AVR.
  • Also freely available low-speed (HID) software emulation
• Ethernet Controller Support
• LCD Controller Support
• Low-voltage Devices Operating Down to 1.8v
• picoPower Devices
• DMA controllers and "Event System" peripheral communication.
• Fast Cryptography support for AES and DES

A pull-up resistor is used in the design of electronic logic circuits. ... A USB flash drive. ... In-System Programming (abbreviated ISP) is ability of some programmable logic devices, microcontrollers, and other programmable electronic chips to be programmed while installed in a complete system, rather than requiring the chip to be programmed prior to installing it into the system. ... JTAG, an acronym for Joint Test Action Group, is the usual name used for the IEEE 1149. ... GPIO is an acronym for General Purpose Input/Output and is used in embedded electronics field. ... An EEPROM (also called an E2PROM)[] or Electronically Erasable Programmable Read-Only Memory, is a non-volatile storage chip used in computers and other devices to store small amounts of volatile (configuration) data. ... Static random access memory (SRAM) is a type of semiconductor memory. ... An application specific standard product or ASSP is an integrated circuit that implements a specific function that appeals to a wide market. ... An example of PWM: the supply voltage (blue) modulated as a series of pulses results in a sine-like flux density waveform (red) in a magnetic circuit of electromagnetic actuator. ... 4-channel stereo multiplexed analog-to-digital converter WM8775SEDS made by Wolfson Microelectronics placed on X-Fi Fatal1ty Pro sound card An analog-to-digital converter (abbreviated ADC, A/D or A to D) is an electronic integrated circuit (i/c) that converts continuous signals to discrete digital numbers. ... 8-channel digital-to-analog converter Cirrus Logic CS4382 placed on Sound Blaster X-Fi Fatal1ty In electronics, a digital-to-analog converter (DAC or D-to-A) is a device for converting a digital (usually binary) code to an analog signal (current, voltage or electric charge). ... I²C is a multi-master serial computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, or cellphone. ... A UART or universal asynchronous receiver-transmitter is a piece of computer hardware that translates between parallel bits of data and serial bits. ... RS-232 (also referred to as EIA RS-232C or V.24) is a standard for serial binary data interchange between a DTE (Data terminal equipment) and a DCE (Data communication equipment). ... EIA-485 (formerly RS-485 or RS485) is an electrical specification of a two-wire, half-duplex, multipoint serial connection. ... The Serial Peripheral Interface Bus or SPI (often pronounced es-pē-ī [IPA: ɛs pi aɪ] or spy [IPA: spaɪ]) bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. ... Tree limbs create a short circuit in electrical lines during a storm that spawned two tornadoes. ... A watchdog timer is a computer hardware timing device that triggers a system reset if the main program, due to some fault condition, such as a hang, neglects to regularly service the watchdog (writing a “service pulse” to it, also referred to as “petting the dog”). The intention is to... An example of PWM: the supply voltage (blue) modulated as a series of pulses results in a sine-like flux density waveform (red) in a magnetic circuit of electromagnetic actuator. ... Controller Area Network (CAN) is a broadcast, differential serial bus standard, originally developed in the 1980s by Robert Bosch GmbH, for connecting electronic control units (ECUs). ... Note: USB may also mean upper sideband in radio. ... It has been suggested that 3D motion controller be merged into this article or section. ... Ethernet is a large, diverse family of frame-based computer networking technologies that operate at many speeds for local area networks (LANs). ... LCD redirects here. ... Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. ... In cryptography, the Advanced Encryption Standard (AES), also known as Rijndael, is a block cipher adopted as an encryption standard by the U.S. government. ... The Data Encryption Standard (DES) is a cipher (a method for encrypting information) selected as an official Federal Information Processing Standard (FIPS) for the United States in 1976, and which has subsequently enjoyed widespread use internationally. ...

Development Tools and Evaluation Kits

Official Atmel AVR development tools and evaluation kits consists of a small number of starter kits and debugging tools with support for most AVR devices:

STK500 Starter Kit

The STK500 starter kit and development system features ISP and high voltage programming (HVP) for all AVR devices, either directly or through extension boards. The board is fitted with DIP sockets for all AVRs available in DIP packages.

STK500 Expansion Modules: Several expansion modules are available for the STK500 board:

• STK501 - Adds support for microcontrollers in 64-pin TQFP packages.
• STK502 - Adds support for LCD AVRs in 64-pin TQFP packages.
• STK503 - Adds support for microcontrollers in 100-pin TQFP packages.
• STK504 - Adds support for LCD AVRs in 100-pin TQFP packages.
• STK505 - Adds support for 14 and 20-pin AVRs.
• STK520 - Adds support for 14 and 20-pin microcontrollers from the AT90PWM family.
• STK525 - Adds support for the AT90USB microcontrollers in 64-pin TQFP packages.
• STK526 - Adds support for the AT90USB microcontrollers in 32-pin TQFP packages

AVR ISP and AVR ISP mkII

The AVR ISP and AVR ISP mkII are inexpensive tools allowing all AVRs to be programmed via ICSP.

The AVR ISP connects to a PC via a serial port, and draws power from the target system. The AVR ISP allows using either of the "standard" ICSP pinouts, either the 10-pin or 6-pin connector. The AVR ISP has been discontinued, replaced by the AVR ISP mkII.

The AVR ISP mkII connects to a PC via USB, and draws power from USB. LED's visible through the translucent case indicate the state of target power.

AVR Dragon (USB)

The Dragon is an inexpensive tool allowing all AVRs to be programmed via JTAG, HVP or ICSP. The Dragon allows debugging of AVRs with 32KB or less of program memory, via JTAG or DebugWire. The Dragon has a small prototype area which can accommodate an 8, 28, or 40-pin AVR, including connections to power and programming pins. There is no area for any additional circuitry.

JTAG (IEEE 1149.1)

The Joint Test Action Group, In Circuit Emulator (JTAGICE) debugging tool supports on-chip debugging (OCD) of AVRs with a JTAG boundary-scan interface. The original JTAGICE is no longer in production, however it has been replaced by the JTAGICE mkII.

JTAGICE mkI

The JTAGICE mkI debugging tool supports on-chip debugging (OCD) of older AVRs with JTAG interface. Newer devices using the debugWire interface cannot be debugged.

JTAGICE mkII

The JTAGICE mkII debugging tool supports on-chip debugging (OCD) of AVRs with JTAG or debugWIRE interface. The debugWire interface enables debugging using only one pin (the Reset pin), allowing debugging of applications running on low pin-count microcontrollers.

The Butterfly Demo Board

Main article: AVR Butterfly

The very popular AVR Butterfly demonstration board is a self-contained, battery-powered computer running the Atmel AVR ATmega169V microcontroller. It was built to show-off the AVR family especially a new built-in LCD interface. The board includes the LCD screen, joystick, speaker, serial port, real time clock (RTC), flash memory chip, and both temperature and voltage sensors. Earlier versions of the AVR Butterfly also contained a photoresistor. The small board has a shirt pin on its back so it can be worn as a name badge. AVR Butterfly Module The AVR Butterfly [1] is a self-contained, battery-powered demonstration board running the ATMEL AVR ATmega169V Microcontroller. ... LDR The internal components of a photoelectric control for a typical American streetlight. ...

The AVR Butterfly comes preloaded with software to demonstrate the capabilities of the microcontroller. Factory firmware can scroll your name, display the sensor readings, and show the time. The AVR Butterfly also has a piezo speaker that can be used to reproduce sounds and music.

The AVR Butterfly demonstrates LCD driving by running a 14-segment, six alpha-numeric character display. However, the LCD interface consumes many of the I/O pins.

The Butterfly's ATmega169 CPU is capable of speeds up to 8 MHz, however it is factory set by software to 2 MHz to preserve the button battery life. A pre-installed bootloader program allows the board to be re-programmed via a standard RS-232 serial plug with new programs that users can write with the free Atmel IDE tools.

AT90USBKey

This small board, about half the size of a business card, is priced at slightly more than an AVR Butterfly. It includes an at90usb1287 with USB-OTG support, 16 MB of DataFlash, LEDs, a small joystick, and a temperature sensor. It's clocked at 8 MHz, and comes with software which lets it act as a USB Mass Storage device (its documentation is shipped on the DataFlash), a USB joystick, and more. To support the USB host capability, it must be operated from a battery; but when running as a USB peripheral, it only needs the power provided over USB. DataFlash is a low pin-count serial interface for flash memory. ...

Only the JTAG port uses conventional 2.54mm pinout. All the other AVR I/O ports require more compact 1.27mm headers, which are not widely supported.

Since it has 128 KB of flash memory, a JTAGICE mkII is the best debug solution; a Dragon can program it, but can't examine its status. You can also program it through USB from a Windows or Linux host, using the USB "Device Firmware Update" protocols.

Third-Party Programmers

A wide variety of third-party programming and debugging tools are available for the AVR. These devices use various interfaces, including RS-232, PC parallel port, and USB. AVR Freaks has a comprehensive list.

Atmel AVR Usage

AVRs have been used in various automotive applications such as security, safety, powertrain and entertainment systems. Atmel has recently launched a new publication "Atmel Automotive Compilation" to help developers with automotive applications. Some current usages are in BMW, Daimler-Chrysler and TRW.

The Arduino physical computing platform is based on an ATMega168 (or ATmega8 in older versions) processor. The Arduino Diecimila. ... Physical computing in the broadest sense means building interactive physical systems by the use of software and hardware that can sense and respond to the analog world. ...

USB-based AVRs have been used in the Microsoft Xbox hand controllers. The link between the controllers and Xbox is USB.

Lego has recently released the firmware source code files for 8-bit AVRs to aid in the development of open-source alternatives to its popular robotics NXT "brick" operating system. For other uses, see Mindstorm. ...

System Semiconductor,Inc recently released the "System on a Chip", which is a Motor and Motion Control Chip, the M3000 with an Atmel AVR Core married to an Advanced Motion Controller for use in a variety of motion applications.

The New 32-Bit AVRs

Atmel has recently released a line of 32-bit RISC microcontrollers AVR32 that feature special SIMD and DSP instructions, along with other audio and video processing features. This line of RISC microcontrollers have already found its place within the industrial and commercial worlds. The AVR32 is a 32-bit RISC microprocessor architecture designed by Atmel. ... -1... A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ...

This 32-bit family of devices is intended to compete with the ARM based processors. The instruction set is similar to other RISC cores, but is not compatible with the original AVR or any of the various ARM cores. The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ...

Footnotes

1. ^ Since 1996, NTH has become part of the Norwegian University of Science and Technology (NTNU)
2. ^ http://www.avrtv.com/2007/09/09/avrtv-special-005/

The Norwegian University of Science and Technology, known by its Norwegian acronym NTNU (from Norges teknisk-naturvitenskapelige universitet), is located in Trondheim. ...

External links

Wikibooks' Embedded Systems has more about this subject:

Atmel AVR

• Atmel AVR Homepage
• AVR Freaks community
• Atmel AVR at the Open Directory Project