This article or section should be merged with CPU cache.

A cache line or cache block is the smallest unit of memory that can be transferred between the main memory and the cache. It is typically on the order of 32 bytes which is brought into cache in its entirety when any of the elements in it is referenced.

Rather than reading a single word or byte from main memory at a time, each cache entry usually holds a certain number of words, known as a "cache line" or "cache block" and a whole line is read and cached at once. This takes advantage of the locality of reference: if one location is read then nearby locations (particularly following locations) are likely to be read soon afterward, which can lead to a higher level of performance. It can also take advantage of page-mode DRAM which allows faster access to consecutive locations.

In cache-based computers (as opposed to architectures that directly work memory-to-memory such as the Cyber 205) data elements first need to be brought into cache before they can be brought into a register in order to be operated on. Most of the times, the architecture is such that not a single element, but rather a few elements, collectively called a cache line, are moved from main memory to cache.