The Cyrix 6x86 is a sixth-generation, 32-bit 80x86-compatible microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. It was originally released in 1996. 32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32-bit chunks. ... The title given to this article is incorrect due to technical limitations. ... A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... Cyrix was a CPU manufacturer that began in 1988 in Richardson, TX as a specialist supplier of high-performance math co-processors for 286 and 386 systems. ... International Business Machines Corporation (IBM, or colloquially, Big Blue) (NYSE: IBM) (incorporated June 15, 1911, in operation since 1888) is headquartered in Armonk, New York, USA. The company manufactures and sells computer hardware, software, and services. ...

Architecture

The Cyrix 6x86 architecture.

The 6x86 combines aspects of both RISC and CISC. It has a superscalar, superpipelined core, and performs register renaming, speculative execution, out-of-order execution, and data dependency removal. However, it continued to use native x86 execution, like Centaur's Winchip, but unlike competitors Intel and AMD who moved to RISC translation with Pentium Pro and K5. Image File history File links Cyrix_6x86_arch. ... Image File history File links Cyrix_6x86_arch. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... A Complex Instruction Set Computer (CISC) is an instruction set architecture (ISA) in which each instruction can indicate several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... Simple superscalar pipeline. ... Term referring to a CPU architecture which further divides each of the traditional pipeline stages (see Pipeline_(computer), Classic RISC pipeline) to obtain improved thruput and higher clock rates. ... In computer engineering, register renaming refers to a technique used to avoid unnecessary serialization of program operations imposed by the reuse of registers by those operations. ... In computer science, speculative execution is the execution of code whose result may not actually be needed. ... In computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ... A data dependency in computer science is a situation whereby computer instructions refer to the results of preceding instructions that have not yet been completed. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... The WinChip series was a a low-power Socket 7-based x86 processor designed by Centaur Technology and marketed by its parent company IDT. // The design of the WinChip was quite different from other processors of the time. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Advanced Micro Devices, Inc. ... The Pentium Pro is a sixth-generation x86 architecture microprocessor (P6 core) produced by Intel and was originally intended to replace the original Pentium in a full range of applications, but later, was reduced to a more narrow role as a server and high-end desktop chip. ... K5 core diagram AMD 5K86-P90 (SSA/5) AMD K5 PR166 The K5 was AMDs first in-house processor, developed to compete with Intels Pentium microprocessor range. ...

With regards to internal caches, it has a 16-kibibyte primary cache and is socket-compatible with the Intel Pentium P54C. It was also unique in that it was the only x86 design to incorporate a 256-byte Level 0 scratchpad cache. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+. These performance levels do not map to the clock speed of the chip itself (for example, a PR 133+ ran at 110 MHz, a PR 166+ ran at 133 MHz, etc). A kibibyte (a contraction of kilo binary byte) is a unit of information or computer storage, commonly abbreviated KiB (never kiB). 1 kibibyte = 210 bytes = 1,024 bytes The kibibyte is closely related to the kilobyte, which can be used either as a synonym for kibibyte or to refer to... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... Socket 370 processor socket The term CPU socket (or CPU slot) is widely used to describe the connector linking the motherboard to the CPU(s) in certain types of desktop and server computers, particularly those compatible with the Intel x86 architecture. ... Pentium MMX - top view The Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ...

Note that the 6x86 and 6x86L weren't completely compatible with the Intel Pentium instruction set. For this reason the chip identified itself as a 80486 and disabled the CPUID instruction by default. CPUID support could be enabled by first enabling extended CCR registers then setting bit 7 in CCR4. The lack of full Pentium compatibility caused problems with some applications because programmers had begun to use Pentium-specific instructions. Some companies released patches for their products to make them function on the 6x86. Pentium MMX - top view The Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. ... Intel i486 DX2- top view The Intel i486 (also called 486 or 80486) is a range of Intel CISC microprocessors which is part of the Intel x86 family of processors. ... The CPUID opcode is an instruction (its name derived from CPU IDentification) for the x86 architecture. ...

The first generation of 6x86 had heat problems. This was primarily caused by their relatively higher heat output than other CPUs of the day and, as such, computer builders sometimes did not equip them with adequate cooling. The CPUs topped out at around 25 W heat output (like the AMD K6), whereas the Pentium produced around 15 W of waste heat at its peak. For other uses, see Watt (disambiguation). ... History 1997 saw the arrival of AMDs K6 microprocessor. ...

6x86 is not multi-processor capable.

Revised cores

The 6x86L was later released by Cyrix to address heat issues; the L standing for low-power. Another release of the 6x86, the 6x86MX, added MMX compatibility, introduced the EMMI instruction set, and quadrupled the primary cache size to 64 kibibytes. This chip was later renamed MII, to better compete with the Pentium II processor. Cyrix was a CPU manufacturer that began in 1988 in Richardson, TX as a specialist supplier of high-performance math co-processors for 286 and 386 systems. ... MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ... Emmi is a Finnish singer-songwriter who sings in English. ...

Performance

Cyrix 6x86MX PR200

It has been speculated by experts that 6x86 was designed to perform well specifically on business-oriented benchmarks of the time, most notably Ziff-Davis' Winstone benchmark. [1] Winstone ran various speed tests using several popular applications. It was one of the leading benchmarks during the mid-'90s and was used in some leading magazines, such as Computer Shopper and PC Magazine, as a deciding factor for system ratings. Image File history File links Size of this preview: 608 × 600 pixelsFull resolution (650 × 641 pixel, file size: 104 KB, MIME type: image/jpeg) Cyrix 6x86MX PR200, Top view Source: my own CPU-collection File historyClick on a date/time to view the file as it appeared at that time. ... Image File history File links Size of this preview: 608 × 600 pixelsFull resolution (650 × 641 pixel, file size: 104 KB, MIME type: image/jpeg) Cyrix 6x86MX PR200, Top view Source: my own CPU-collection File historyClick on a date/time to view the file as it appeared at that time. ... In computing, a benchmark is the act of running a computer program, a set of programs, or other operations, in order to assess the relative performance of an object, normally by running a number of standard tests and trials against it. ... Computer Shopper is a magazine published monthly since 1988 in the UK by Felix Denniss company, Dennis Publishing Ltd. ... PC Magazine (or PC Mag) is a computer magazine published biweekly (except in January and July) both in print and online. ...

The 6x86's integer performance was fantastic. As said earlier, Cyrix used a PR rating (Performance Rating) to relate their performance to the Intel Pentium Classic (pre-P55C), because a 6x86 at a lower clock rate outperformed the higher-clocked Pentium. For example, a 133 MHz 6x86 will outperform a Pentium Classic at 166 MHz, and as a result Cyrix could market the 133 MHz chip as being a Pentium 166's equal. A PR rating was also necessary because the 6x86 could not clock as high as Pentium and maintain equivalent manufacturing yields, so it was critical to establish the slower clock speeds as equal in the minds of the consumer. The PR rating was not an entirely truthful representation of the 6x86's performance, however. The PR rating system was developed by AMD in the mid-1990s as a method of comparing their x86 processors to those of rival Intel. ... Pentium MMX - top view The Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. ...

While it can be simply said that its integer performance is excellent, the same can not be said with regard to its floating point performance. The FPU is considerably less robust than that of the Pentium (let alone the P6 FPU.) During the 6x86's development, the majority of applications (office software) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget. A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ... The P6 microarchitecture is the sixth generation Intel x86 microprocessor architecture, released in 1995. ... In computers, an office applications suite, sometimes called an office suite, productivity suite, offimatic suite or integrated offimatic program, is a application software intended to be used by typical clerical and knowledge workers. ...

The poor FPU performance of the 6x86 can be mostly attributed to major FPU instructions taking at least 4 clock cycles and that it was not pipelined. It was not much faster than a 486 FPU at the same clock speed. The popularity of the Pentium caused many software developers to hand-optimize code in assembly language, to take advantage of the Pentium's pipelined and lower latency FPU. For example, the highly anticipated first person shooter Quake used highly-optimized assembly code designed almost entirely around the Pentium's FPU. As a result, the Pentium significantly outperformed other CPUs in the game. Fortunately for the 6x86 (and AMD K6), many games continued to be integer-based throughout the chip's lifetime. For other uses, see Software developer (disambiguation). ... See the terminology section, below, regarding inconsistent use of the terms assembly and assembler. ... A first-person shooter (FPS) is a computer or video game where the players on-screen view of the game world simulates that of the character, and there is some element of shooting involved. ... Zombies attacking the player at the starting of Episode 1, Mission 3: The Necropolis. ...

The 6x86 successor, MII, was late to market, and couldn't scale well in clock speed. Cyrix had made a mistake with 6x86, similar to what AMD had done with their K5; design a chip far more focused on integer per-clock performance superiority than clock scalability. As such, 6x86 and MII were forced to compete at the low-end of the market because AMD K6 and Intel Pentium II were always at least one step ahead on clock speed. This, combined with the limited floating point unit, and an integer section that was at best on-par with the newer P6 and K6 chips, Cyrix could no longer compete in performance. The P6 microarchitecture is the sixth generation Intel x86 microprocessor architecture, released in 1995. ...

External links

• Cyrix 6x86 ("M1") at PCGuide
• cpu-collection.de Cyrix 6x86 processor images and descriptions
• Paul Hsieh's 6th Generation x86 CPU Comparison in-depth analysis of 6th generation x86 CPUs, including the 6x86MX.
• Cyrix M1 stats at Sandpile.org

This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL. This article does not cite any references or sources. ... “GFDL” redirects here. ...