DDR SDRAM or double-data-rate synchronous dynamic random access memory is a class of memory integrated circuit used in computers. It achieves greater bandwidth than the preceding single-data-rate SDRAM by transferring data on the rising and falling edges of the clock signal (double pumped). Effectively, it nearly doubles the transfer rate without increasing the frequency of the front side bus. Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. ... DRAM is a type of random access memory that stores each bit of data in a separate capacitor. ... DRAM is a type of random access memory that stores each bit of data in a separate capacitor. ... DRAM is a type of random access memory that stores each bit of data in a separate capacitor. ... SDRAM means synchronous dynamic random access memory which is a type of solid state computer memory. ... SDRAM means synchronous dynamic random access memory which is a type of solid state computer memory. ... “DDR2” redirects here. ... This article does not cite any references or sources. ... Direct Rambus DRAM or DRDRAM (sometimes just called Rambus DRAM or RDRAM) is a type of synchronous dynamic RAM, designed by the Rambus Corporation. ... Virtual Channel Random Access Memory (VC-RAM in short, other names such as VC-SDRAM, VCSDRAM, VCDRAM, or VCM) was a proprietary type of SDRAM produced by NEC which NEC called it as an open standard, with no licensing fees associated with VCM. VCM creates a state in which the... XDR DRAM is a high performance RAM Interface like SDR-SDRAM and DDR-SDRAM. The XDR solution was engineered to be effective in small high-bandwidth consumer systems, high-performance main memory applications, and flagship GPUs. ... VRAM an acronym for Video RAM. Generally a term used in computers to describe RAM dedicated to the purpose of displaying bitmap graphics in raster graphics hardware. ... Window RAM or WRAM is an obsolete type of semiconductor computer memory that was designed to replace video RAM (VRAM) in graphics adapters. ... Synchronous Graphics random accsess memory SGRAM is based on SDRAM, but includes graphics-specific read/write functions SGRAM also retrieves blocks of data and so reduces the number of reads and writes that memory must carry out. ... DDR2 SDRAM (Double Data Rate Two Synchronous Dynamic Random Access Memory) is a computer memory technology that, as of 2005, is becoming the mainstream standard for personal computer memory. ... GDDR3 (Graphics Double Data Rate, version 3) is a graphics card-specific memory technology, designed by ATI Technologies. ... This article does not cite any references or sources. ... GDDR5 (Graphics Double Data Rate, version 5) is a type of graphics card memory. ... In computing, a computer bus operating with double data rate transfers data on both the rising and falling edges of the clock signal. ... Several SDRAM ICs on a DIMM package. ... Integrated circuit of Atmel Diopsis 740 System on Chip showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window, showing the integrated circuit inside. ... This article is about the machine. ... -1... SDR memory (front only shown) has 168 pins and two notches. ... In synchronous digital electronics, such as most computers, a clock signal is a signal used to coordinate the actions of two or more circuits. ... In computing, a double pumped computer bus transfers data on both the rising and falling edges of the clock signal, effectively doubling the data transmission rate without having to deal with the additional problems of timing skew that increasing the number of data lines would introduce. ... In telecommunication, data transfer rate or just transfer rate is the average number of bits, characters, or blocks per unit time passing between corresponding equipment in a data transmission system. ... In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and the northbridge. ...

Thus, a system with a 100 MHz front side bus has an effective clock rate of 200 MHz when DDR SDRAM memory is installed. The same system using SDR (single data rate) SDRAM, will not have its front side bus rate doubled and be limited to a 100 MHz front side bus speed. MegaHertz (MHz) is the name given to one million (106) Hertz, a measure of frequency. ... The clock rate is the fundamental rate in cycles per second (measured in hertz) at which a computer performs its most basic operations such as adding two numbers or transferring a value from one processor register to another. ...

With data being transferred 64 bits at a time, DDR SDRAM gives a transfer rate of [mbcr x 2 x 64] / 8; annotated it looks like this: (memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus with a bus frequency of 100 MHz, DDR-SDRAM gives a max transfer rate of 1600 MB/s. This article is about the unit of information. ... ReBoot character, see Megabyte (ReBoot). ... Look up second in Wiktionary, the free dictionary. ...

JEDEC has set standards for speeds of DDR SDRAM, divided into two parts: The first specification is for memory chips and the second is for memory modules. JEDEC stands for Joint Electron Device Engineering Council and is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. ...

As DDR is superseded by the newer DDR2, the older version is commonly refered to as DDR1.

Chips and modules

Note: All above listed are specified by JEDEC as JESD79. All RAM speeds in-between or above these listed specifications are not standardized by JEDEC — most often they are simply manufacturer optimizations using higher-tolerance or overvolted chips. This article is about the unit of measurement. ... JEDEC stands for Joint Electron Device Engineering Council and is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. ...

The package sizes in which DDR SDRAM is manufactured are also standardised by JEDEC.

DDR SDRAM memory modules have 184 pins and one notch

There is no architectural difference between DDR SDRAM designed for different clock frequencies, e.g. PC-1600 (designed to run at 100 MHz) and PC-2100 (designed to run at 133 MHz). The number simply designates the speed that the chip is guaranteed to run at. Hence DDR SDRAM can be run at lower clock speeds than it was made for (underclocking) or higher clock speeds than it was made for (overclocking). Image File history File links No higher resolution available. ... Image File history File links No higher resolution available. ... Underclocking is the practice of modifying a microprocessors speed settings to run at a lower clock speed than the manufacturers specification. ... AMD Athlon XP Overclocking BIOS Setup on ABIT NF7-S. FSB frequency (External clock) has increased from 133 MHz to 148 MHz, and clock multiplier factor has changed from 13. ...

DDR SDRAM DIMMs have 184 pins (as opposed to 168 pins on SDRAM, or, 240 pins on DDR2 SDRAM), and can be differentiated from SDRAM DIMMs by the number of notches (DDR SDRAM has one, SDRAM has two). DDR SDRAM operates at a voltage of 2.5 V, compared to 3.3 V for SDRAM. This can significantly reduce power usage. Note: some DIMMs have nominal voltage of 2.6 V [1]. Two types of DIMMs: a 168-pin SDRAM module (top) and a 184-pin DDR SDRAM module (bottom). ... Josephson junction array chip developed by NIST as a standard volt. ...

Many new chipsets use these memory types in dual-channel configurations, which doubles or quadruples the effective bandwidth. Dual-channel architecture DDR SDRAM describes a motherboard technology that effectively doubles data throughput in the frontside bus from RAM to the memory controller. ...

Chip characteristics

• DRAM density. Size of the chip in mebibits. Example: 256 Mibit — 32 MiB chip.
• DRAM organization. Written in the form of 64M x 4, where 64M is a number of storage units (64 million), x4 (pronounced «by 4») — number of bits per chip, which equals the number of bits per storage unit. There are x4, x8, and x16 DDR chips. The x4 chips allows the use of advanced error correction features like Chipkill, memory scrubbing and Intel SDDC, while the x8 and x16 chips are somewhat more expensive.

A mebibit (a contraction of mega binary bit) is a unit of information or computer storage, abbreviated Mibit or sometimes Mib. ... The three-letter acronym MIB may refer to any of several concepts: Management information base, a computing information repository used (for example) by SNMP In marbles, any marble, but esp. ... In computer memory systems, Chipkill is a form of advanced Error Checking and Correcting (ECC) computer memory technology that protects computer memory systems from any single memory chip failure as well as multi-bit errors from any portion of a single memory chip. ...

Module characteristics

• Size.
• # of DRAM Devices. The number of chips is a multiple of 8 for non-ECC modules and a multiple of 9 for ECC modules. Chips can occupy one side (Single Sided) or both sides (Dual Sided) of the module. The maximum amount of chips per DDR module is 36 (9x4).
• # of DRAM rows (ranks). Any given module can have 1, 2 or 4 rows, but only 1 row of a module can be active at any moment of time. When a module has 2 or more rows, the memory controller must periodically switch between them by performing close and open operations.
• Timings: CAS Latency (CL), Clock Cycle Time (tCK), Row Cycle Time (tRC), Refresh Row Cycle Time (tRFC), Row Active Time (tRAS).
• Buffering: Registered vs. unbuffered

Module and chip characteristics are inherently linked. In information theory and coding, an error-correcting code or ECC is a code in which each data signal conforms to specific rules of construction so that departures from this construction in the received signal can generally be automatically detected and corrected. ... This article or section is in need of attention from an expert on the subject. ...

Total module size is a product of one chip size by number of chips. ECC modules multiply it by 8/9 because they use one bit per every byte for error correction. A module of any particular size can therefore be assembled either from 36 small chips, or 18 or 9 bigger ones.

DDR memory bus width per channel is 64 bits (72 for ECC memory). Total module bit width is a product of bits per chip by number of chips. It also equals number of ranks (rows) multiplied by DDR memory bus width. Consequently a module with greater amount of chips or using x8 chips instead of x4 will have more ranks.

This example compares different real-world server memory modules with a common size of 1 GiB. One should definitely be careful buying 1 GiB memory module, because all these variations can be sold under one price position without stating whether they are x4 or x8, single or dual ranked. The term gib may refer to: a castrated male cat or ferret an abbreviation for gibibyte (GiB) or gibibit (Gib) an abbreviation for Gibraltar an abbreviation for Gib Board, itself an abbreviation of Gibraltar Board, all Winston Wallboards[1] tradenames for drywall (plasterboard). ...

There is a common belief that number of module rows or ranks equals number of sides. As above data shows, this is not true. One can find (2-side, 1-rank) or (2-side, 4-rank) modules. One can even think of 1-side, 2-rank memory module having 16(18) chips on single side x8 each, but it's unlikely such a module was ever produced.

Alternatives

DDR (DDR1) has been superseded by DDR2 SDRAM, which has some modifications to allow higher clock frequency, but operates on the same principle as DDR. Competing with DDR2 are Rambus XDR DRAM. DDR2 has become the standard, as XDR is lacking support. DDR3 SDRAM is a new standard that offers even faster performance and new features. “DDR2” redirects here. ... This article is about the company. ... XDR DRAM is a high performance RAM Interface like SDR-SDRAM and DDR-SDRAM. The XDR solution was engineered to be effective in small high-bandwidth consumer systems, high-performance main memory applications, and flagship GPUs. ... This article does not cite any references or sources. ...

DDR's prefetch buffer depth is 2 bits; DDR2 uses 4 bits. Although the effective clock speeds of DDR2 are higher than for DDR, the overall performance was no greater in the early implementations, primarily due to the high latencies of the first DDR2 modules. DDR2 started to be effective by the end of 2004, as modules with lower latencies became available.[2]

Memory manufacturers have stated that it is impractical to mass-produce DDR1 memory with effective clock rates in excess of 400 MHz. DDR2 picks up where DDR1 leaves off, and is available at clock rates of 400 MHz and higher.

RDRAM is a particularly expensive alternative to DDR SDRAM, and most manufacturers have dropped its support from their chipsets. Direct Rambus DRAM or DRDRAM (sometimes just called Rambus DRAM or RDRAM) is a type of synchronous dynamic RAM, designed by the Rambus Corporation. ...

MDDR

MDDR is an acronym that some enterprises use for Mobile DDR SDRAM, a type of memory used in some portable electronic devices, like mobile phones, handhelds, and digital audio players. While standard DDR SDRAM operates at a voltage of 2.5V, MDDR operates at voltage of 1.8V, which allows a reduced power consumption. A handheld is most often used to refer to: A personal digital assistant (PDA). ... A hard-drive-based player (Apple iPod) An MP3 CD player (Philips Expanium) A flash-based player (iBox Mediaman) A digital audio player (DAP) is a device that stores, organizes and plays digital music files. ... International safety symbol Caution, risk of electric shock (ISO 3864), colloquially known as high voltage symbol. ...

See also

• Dual-channel architecture
• Serial Presence Detect (SPD)
• Fully Buffered DIMM
• List of device bandwidths
• DDR2 SDRAM, and DDR3 SDRAM which use DDR
• Double Data Rate
• Quadruple data rate

Dual-channel architecture DDR/DDR2 SDRAM describes a motherboard technology that effectively doubles data throughput from RAM to the memory controller. ... Serial Presence Detect (SPD) refers to a standardized way to access manufacturer information from a computer memory module. ... FB-DIMM Architecture Fully Buffered DIMM (or FB-DIMM) is a memory technology which can be used to increase reliability, speed and density of memory systems. ... This is a list of device bandwidths: the channel capacity (or, more informally, bandwidth) of some computer devices employing methods of data transport is listed by bit/s, kilobit/s (kbit/s), megabit/s (Mbit/s), or gigabit/s (Gbit/s) as appropriate and also MB/s or megabytes per... “DDR2” redirects here. ... This article does not cite any references or sources. ... In computing, a computer bus operating with double data rate transfers data on both the rising and falling edges of the clock signal. ... Quadruple data rate (or quad pumping) is a microprocessor communication technique wherein data is transmitted four times for each clock cycle. ...

External links

• Official JEDEC website
• http://www.ddrmemoryram.com/ddrsdram_and_sdram.html
• http://www.pcguide.com/ref/ram/tech_SDRAM.htm
• Good guide to Dual Channel DDR
• Raj Mahajan. Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2. MemCore Inc www.memcoreinc.com.