Dataflow architecture is a computer architecture that directly contrasts the traditional von Neuman or control flow architecture. Dataflow architectures do not have a program counter or (at least conceptually) main memory and the executability and execution of instruction is determined based on availability of input arguments to the instructions. No commercially successful computer hardware has used a dataflow architecture. In computer science, computer architecture is the conceptual design and fundamental operational structure of a computer system. ... In computer science and in computer programming, statements in pseudocode or in a program are normally obeyed (or executed) one after the other in the order in which they are written (sequential flow of control). ... The program counter (also called the instruction pointer in some computers) is a register in a computer processor which indicates where the computer is in its instruction sequence. ... Primary storage is a category of computer storage, often called main memory. ...
Microprocessor Technology (1996-99) introduces the quantitative approach to Computer Architecture, including design trade-offs concerning Instruction Sets, Pipelined Processors and Caches.
Asynchronous Systems and Circuits (Oxford University, 1993-95) explores how asynchronous systems can be designed so as to exploit the fine-grained concurrency available in VLSI.
Pessolano, F. A solution to Object Code Incompatibility for static scheduled architectures and its extension to Multi-ISA.
For this reason, the impact of the convergence of the dataflow and control-flow was investigated [16, 125, 127, 141, 169].
The model was proposed by Watson and Gurd at the University of Manchester (England) [229], and by Arvind and Nikhil at MIT [23].
Pebbles: The Pebbles architecture [180] from Colorado State University (Fort Collins, Co, USA) is a large-grain dataflowarchitecture with a decoupling of the synchronization unit and the execution unit within the processing elements.
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