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The Emotion Engine is a CPU developed and manufactured by Sony and Toshiba for use in the Sony PlayStation 2. It consists of a MIPS based core, two Vector Processing Units (VPU), a graphics interface (GIF), a 10 channel DMA unit, a memory controller, an Image Processing Unit (IPU) and an input output interface. Download high resolution version (660x660, 31 KB) Wikipedia does not have an article with this exact name. ...
Download high resolution version (660x660, 31 KB) Wikipedia does not have an article with this exact name. ...
Sony Corporation ) is a Japanese multinational corporation and one of the worlds largest media conglomerates with revenue of $66. ...
Toshiba Corporations headquarters (Center) in Hamamatsucho, Tokyo Toshiba Corporation sales by division for year ending March 31, 2005 Toshiba Corporation ) (TYO: 6502 ) is a Japanese multinational conglomerate manufacturing company, headquartered in Tokyo, Japan. ...
PS2 redirects here. ...
A MIPS R4400 microprocessor made by Toshiba. ...
Description At the heart of the Emotion Engine is a two way superscalar in order MIPS based core primarily based on the MIPS III ISA but includes some instructions defined by the MIPS IV ISA. The MIPS based core consists of two 64 bit fixed point units one single precision (32 bit) floating point unit with a six stage pipeline. To feed the execution units with instructions and data, there is a 16 KB two way set associative instruction cache, an 8 KB two way set associative non blocking data cache and a 16 KB scratchpad RAM. Both the instruction and data caches are virtually indexed and physically tagged while the scratchpad RAM exists in a separate memory space. A combined 48 double entry instruction and data translation look aside buffer is provided for translating virtual addresses. Branch prediction is achieved by a 64 entry branch target address cache and a branch history table that is integrated into the instruction cache. The branch mispredict penalty is three cycles due to the short six stage pipeline. Simple superscalar pipeline. ...
In computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ...
A MIPS R4400 microprocessor made by Toshiba. ...
An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ...
A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ...
A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ...
Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ...
Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ...
There are very few or no other articles that link to this one. ...
The two VPUs (VPU0 and VPU1) provide the majority of the Emotion Engine's floating point performance. Each VPU features thirty two 128 bit registers, sixteen 16 bit fixed point registers, four FMAC units, a FDIV unit and a local data memory. The data memory for VPU0 is 4 KB in size while VPU1 features a 16 KB data memory. To achieve high bandwidth, the VPU's data memory is connected directly to the GIF, and both of the data memories can be read directly by the DMA unit. A single vector instruction consists of four 32 bit IEEE compliant single precision floating point values which are distributed to the four single precision (32 bit) FMAC units for processing. Contrary to popular belief, the Emotion Engine is not a 128 bit processor as it does not process a 128-bit value, only a bunch of four 32 bit values that fit into one 128 bit register. This scheme is similar to the SSEx extensions by Intel. The FMAC units have an instruction latency of four cycles, but as they have a six stage pipeline, they have a throughput of one cycle per an instruction. The FDIV unit has a nine stage pipeline and can execute one instruction every seven cycles.
Communications between the MIPS core, the two VPUs, GIF, memory controller and other units is handled by a 128 bit wide internal data bus running at half the clock frequency of the CPU. At 300 MHz, the internal data bus provides a maximum theoretical bandwidth of 2.4 GiB/s. DMA transfers over this bus occurs in packets of eight 128 bit words, achieving a peak bandwidth of 2 GiB/s. The Emotion Engine interfaces directly to the Graphics Synthesizer via the GIF and a dedicated 64 bit wide, 150 MHz bus with a maximum theoretical bandwidth of 1.2 GiB/s.
Communication between the Emotion Engine and RAM occurs through two channels of DRDRAM and the memory controller, which interfaces to the internal data bus. The two channels of DRDRAM have a maximum theoretical bandwidth of 3.2 GiB/s, about 33% more bandwidth than the internal data bus. Because of this, the memory controller buffers data sent from the DRDRAM channels so the extra bandwidth can be utilised by the CPU.
To provide communications between the Emotion Engine and the Input Output Processor (IOP), the input output interface interfaces a 32 bit wide, 37.5 MHz input output bus with a maximum theoretical bandwidth of 150 MB/s to the internal data bus. It should be noted that this interface provides vastly more bandwidth than what is required by the PlayStation's input output devices.
The first versions of the PlayStation 3 featured an Emotion Engine on its motherboard to achieve backwards compatibility with Playstation and PlayStation 2 titles. However, subsequent releases of the Playstation 3, including the initial PAL release, dropped the Emotion Engine to lower costs. Instead, software emulation is used to allow backwards compatibility. The PlayStation 3 , trademarked PLAYSTATION®3,[3] commonly abbreviated PS3) is the third home video game console produced by Sony Computer Entertainment; successor to the PlayStation 2. ...
For other uses, see PAL (disambiguation). ...
Specifications - Clock Frequency: 294 MHz, 300 MHz (Later Versions)
- Instruction Set: MIPS III, MIPS IV Subset, 107 Vector Instructions
- MIPS Based Core: 2 Issue, 2 64 Bit Fixed Point Units, 1 Floating Point Unit, 6 Stage Pipeline
- Instruction Cache: 16 KB, 2 Way Set Associative
- Data Cache: 8 KB, 2 Way Set Associative
- Scratchpad RAM: 16 KB
- Translation Look Aside Buffer: 48 Entry Combined Instruction/Data
- Vector Processing Unit: 4 FMAC Units, 1 FDIV Unit
- Vector Processing Unit Registers Register: 128 Bit Wide, 32 Entries
- Image Processing Unit: MPEG2 Macroblock Layer Decoder
- Direct Memory Access: 10 Channels
- Internal Data Bus: 128 Bit, 150 MHz, 2 GiB/s Maximum Effective Bandwidth
- Memory Bus: Two 16 Bit, 400 MHz DRDRAM Channels, 3.2 GiB/s Maximum Theoretical Bandwidth
- Manufacturing Process: 0.25 µm (0.18 µm Effective LG, 4 Layer Metal, CMOS
- VDD Voltage: 1.8 V
- Power Consumption: 15 W at 1.8 V
- Transistor Count: 10.5 Million
- Die Area: 240 mm²
- Chip Packaging: 540 Contact PBGA
In synchronous digital electronics, such as most computers, a clock signal is a signal used to coordinate the actions of two or more circuits. ...
MegaHertz (MHz) is the name given to one million (106) Hertz, a measure of frequency. ...
An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ...
Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ...
Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ...
There are very few or no other articles that link to this one. ...
In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ...
MP2, also known as Musicam, is a short form of MPEG-1 Audio Layer 2 (not MPEG-2), and it is also used as a file extension for files containing audio data of this type. ...
MPEG-2 is a standard for the generic coding of moving pictures and associated audio information [1]. It describes a combination of lossy video compression and lossy audio compression (audio data compression) methods which permit storage and transmission of movies using currently available storage media and transmission bandwidth. ...
A Digitrax DH163AT DCC decoder in an Athearn locomotive before the shell goes on. ...
Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. ...
A micrometre (American spelling: micrometer, symbol µm) is an SI unit of length equal to one millionth of a metre, or about a tenth of the diameter of a droplet of mist or fog. ...
A micrometre (American spelling: micrometer, symbol µm) is an SI unit of length equal to one millionth of a metre, or about a tenth of the diameter of a droplet of mist or fog. ...
International safety symbol Caution, risk of electric shock (ISO 3864), colloquially known as high voltage symbol. ...
For other uses, see Watt (disambiguation). ...
A die is a tool used in the manufacturing industry to create a wide variety of products and components. ...
Performance Please note that these figures are theoretical. A floating-point number is a digital representation for a number in a certain subset of the rational numbers, and is often used to approximate an arbitrary real number on a computer. ...
A cube in two-point perspective. ...
In mathematics, a transformation in elementary terms is any of a variety of different functions from geometry, such as rotations, reflections and translations. ...
Not to be confused with lightning. ...
For other uses, see Fog (disambiguation). ...
Cubic Bézier curve In the mathematical field of numerical analysis, a Bézier curve is a parametric curve important in computer graphics. ...
This example shows an image with a portion greatly enlarged, in which the individual pixels are rendered as little squares and can easily be seen. ...
References - Sony's Emotionally Charged Chip. Keith Diefendorff. The Microprocessor Report, Volume 13, Number 5. 19 April, 1999.
See also PS2 redirects here. ...
A graphics/video/display card/board/adapter is a computer component designed to convert the logical representation of visual information into a signal that can be used as input for a display medium. ...
“GPU†redirects here. ...
This article is about the scientific discipline of computer graphics. ...
This is a list of computer graphics and descriptive geometry topics, by Wikipedia page. ...
Layout of the IBM Cell die Cell is a microprocessor architecture jointly developed by a Sony, Toshiba, and IBM, an alliance known as STI. The architectural design and first implementation were carried out at the STI Design Center over a four-year period beginning March 2001 on a budget reported...
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