Shannon's theorem is an important theory in error correction which describes the maximum attainable efficiency of an error-correcting scheme versus the levels of noise interference expected.
Note 1: If the number of errors is less than or equal to the maximum correctable threshold of the code, all errors will be corrected.
Note 2:Error-correcting codes require more signal elements than are necessary to convey the basic information.
Note 3: The two main classes of error-correcting codes are block codes and convolutional codes.
See also Hamming code and Reed-Solomon code; or, for state-of-the-art codes developed from 1993 to 2003, see sparse graph codes, specifically low-density parity-check codes, turbo codes, and digital fountain codes.
The on-line textbook: Information Theory, Inference, and Learning Algorithms (http://www.inference.phy.cam.ac.uk/mackay/itila/), by David MacKay, contains chapters on elementary error-correcting codes; on the theoretical limits of error-correction; and on the latest state-of-the-art error-correcting codes, including low-density parity-check codes, turbo codes, and digital fountain codes.
There are several different types of errorcorrectingcodes that have been invented over the years, but the type commonly used on PCs is the Reed-Solomon algorithm, named for researchers Irving Reed and Gustave Solomon, who first discovered the general technique that the algorithm employs.
Reed-Solomon codes are widely used for error detection and correction in various computing and communications media, including magnetic storage, optical storage, high-speed modems, and data transmission channels.
Errors that can be corrected using the redundant information are corrected before passing the data to the rest of the system.
Each ECCblock is constituted by a BCA content code of 1 byte, content data length of 1 byte, and content data of 14 bytes.
The digital broadcasting transmission apparatus includes a robust processor that codes a robust stream of a dual transport stream where a normal stream and the robust stream are combined.
ECC hardware circuitry provides detection, correction and generation of ECCdata bits in conjunction with memory data read and writes.