Explicit Data Graph Execution or EDGE is an instruction set architecture which takes a different path from the traditional instruction / register designs like RISC and CISC. Instead, EDGE processors map the computations required in a basic block, called operands, to a flexible routing layer, allowing the individual operations to communicate their results to the consuming operations without going through the bottleneck of a register file. An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ... Machine code or machine language is a system of instructions and data directly understandable by a computers central processing unit. ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to commonly used values—typically, the values being in the midst of a calculation at a given point in time. ... The reduced instruction set computer, or RISC, is a microprocessor CPU design philosophy that favors a simpler set of instructions that all take about the same amount of time to execute. ... A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... In computing, a basic block is a straight-line piece of code without any jumps or jump targets in the middle; jump targets, if any, start a block, and jumps end a block. ... A register file is an array of processor registers in a central processing unit (CPU). ...

External link

• Overview of the TRIPS project An implementation of an EDGE architecture.