Fully Buffered DIMM (or FB-DIMM) is a memory solution which can be used to increase reliability, speed and density of memory systems. Traditionally, data lines from Memory Controller has to be connected to data lines in every DRAM module. As memory widths, as well as speed of access, increases, the signal degrades at the interface of the bus and the device. This limits the speed or the memory density. FB-DIMMs take a different approach to solve this problem. Two types of DIMMs: a 168-pin SDRAM module (top) and a 184-pin DDR SDRAM module (bottom). ... Dram can mean several things: for the imperial unit of volume see dram (volume) for the imperial unit of weight or mass see avoirdupois and apothecaries system of mass for the Armenian monetary unit see dram (currency) DRAM is a type of RAM and unlike dram is spelled in all...
Technology
Fully Buffered DIMM architecture introduces an Advanced Memory Buffer (AMB) between the memory controller and the memory module. Unlike the parallel bus architecture of traditional DRAMs, FB-DIMM has a serial interface between the memory controller and AMB. This enables us to increase the width of the memory without increasing the pin count of the memory controller too much. With this architecture, the memory controller does not write to the memory module directly, it is rather done via the AMB. The AMB thus can compensate for signal deterioration by buffering and resending the signal. In addition, the AMB can also offer error correction, without posing any overhead on the processor or memory controller. It can also use the Bit Lane Failover Correction feature to identify bad data paths and remove them from operation, thus dramatically reducing command/adress errors. Also, since reads and writes are buffered, they can be done parallely by the memory controller. This allows simpler interconnects, more memory bandwidth, and (in theory) memory controllers to be hardware-agnostic, i.e. DDR2 and DDR3 chips can be used interchangeably. The downside of this approach is that it introduces latency to the memory request: however, the approach should allow higher memory speeds in the future thus obviating this concern.
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