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In computer science, an interrupt is an asynchronous signal from hardware or software indicating the need for attention. A hardware interrupt causes the processor to save its state of execution via a context switch, and begin executing an interrupt handler. Software interrupts are usually implemented as instructions, in the instruction set, which cause a context switch to the interrupt handler similarly to a hardware interrupt. Wikibooks Wikiversity has more about this subject: School of Computer Science Open Directory Project: Computer Science Downloadable Science and Computer Science books Collection of Computer Science Bibliographies Belief that title science in computer science is inappropriate Categories: Wikipedia articles needing priority cleanup | Computer science ...
An asynchronous circuit is a circuit in which the parts are largely autonomous. ...
A CPU The exact term processor is a sub-system of a data processing system which processes received information after it has been encoded into data by the input sub-system. ...
A context switch is the computing process of storing and restoring the state of a CPU (the context) such that multiple processes can share a single CPU resource. ...
An Interrupt Handler is the modern progression of an interrupt service routine, a routine whose execution is triggered by an interrupt. ...
An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ...
Overview
Interrupts originated as a way to avoid wasting the processors valuable time in polling loops, waiting for external events. Instead, an interrupt signals the processor when an event occures, allowing the processor to process other work while the event is pending.
Interrupts may be implemented in hardware as a distinct system with control lines, or they may be integrated into the memory subsystem. If implemented in hardware, a Programmable Interrupt Controller (PIC) or Advanced Programmable Interrupt Controller (APIC) is connected to both the interrupting device and to the processor's interrupt pin. If implemented as part of the memory controller, interrupts are mapped into the systems address space. A Programmable Interrupt Controller (PIC) is a device which allows priority levels to be assigned to its interrupt outputs. ...
An Advanced Programmable Interrupt Controller (APIC) is a more intricate Programmmable Interrupt Controller (PIC). ...
Interrupts can be catagorized into the following types: software interrupt, maskable interrupt, non-maskable interrupt (NIM), interprocessor interrupt (IPI), and spurious interrupt. A software interrupt is an interrupt generated within a processor by executing an instruction. A maskable interrupt is essentially a hardware interrupt which may be ignored by setting a bit in a bit-mask. Likewise, a non-maskable interrupt is a hardware interrupt which typically has does not have a bit-mask associated with it allowing it to be ignored. An interprocess interrupt is a special type of interrupt which is generated by one processor to interrupt another processor in a multiprocessor system. A spurious interrupt is a hardware interrupt which is generated by system errors, such as electrical noise on one of the PICs interrupt lines. A non-maskable interrupt (or NMI) is a special type of interrupt used in most types of microcomputer, for example the IBM PC and Apple II. An NMI causes a CPU to stop what it was doing, change the instruction pointer to point to a particular address and continue executing...
Processors typically have an internal interrupt mask which allows software to ignore all external hardware interrupts while it is set. This mask typically offers faster access than accessing the masks in external hardware interrupt controllers.
The phenomenon where the overall system performance is severely hindered by excessive amounts of processing time spent handling interrupts is called an interrupt storm or live lock. In operating systems, an Interrupt Storm is the generally accepted jargon term for the phenomena where the overall system performance is severely hindered by excessive amounts of processing time spent handling interrupts. ...
Typical Uses Typical interrupt uses include the following: system timers, disks IO, power-off signals, and traps. Other interrupts exist to transfer data bytes using UARTs or Ethernet; sense key-presses; control motors; or anything else the equipment must do. A UART or universal asynchronous receiver-transmitter is a piece of computer hardware that translates between parallel bits of data and serial bits. ...
Ethernet is a frame-based computer networking technology for local area networks (LANs). ...
A classic system timer interrupt interrupts periodically from a counter or the power-line. The interrupt handler counts the interrupts to keep time. The timer interrupt may also be used to by the OSs task scheduler to reschedule the priorities of running processes. Counters are popular, but some older computers used the power line frequency instead, because power companies in most Western countries control the power-line frequency with an atomic clock. Process (lat. ...
Atomic clock Chip-Scale Atomic Clock Unveiled by NIST An atomic clock is a type of clock that uses an atomic resonance frequency standard as its counter. ...
A disk interrupt signals the completion of a data transfer from or to the disk peripheral. A process waiting to read or write a file starts up again.
A power-off interrupt predicts or requests a loss of power. It allows the computer equipment to perform an orderly shutdown.
Interrupts are also used in typeahead features for buffering events like keystrokes. Typeahead is a feature of computers and software (and typewriters, in days gone by) that enables users to continue typing regardless of program or computer operation - the user may type in whatever speed he desires, and if the receiving software is busy at the time it will be called to...
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