2007 Itanium logo

Itanium Central processing unit
Itanium 2 processor, 2003
Produced:	From mid 2001 to present
Manufacturer:	Intel
CPU speeds:	733 MHz to 1.66 GHz
FSB speeds:	300 MHz to 667 MHz
Instruction set:	Itanium
Cores:	1 or 2
Socket:	PAC611
Core names: McKinley Madison Hondo Deerfield Montecito Montvale

Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together. Image File history File links No higher resolution available. ... Image File history File links No higher resolution available. ... CPU redirects here. ... Image File history File links Itanium2. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... CPU redirects here. ... This article is about the SI unit of frequency. ... This article is about the SI unit of frequency. ... In personal computers, the front side bus (FSB) or system bus is the physical bi-directional bus that carries all electronic signal information between the central processing unit (CPU) and the northbridge. ... A megahertz (MHz) is one million (106) hertz, a measure of frequency. ... A megahertz (MHz) is one million (106) hertz, a measure of frequency. ... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... Diagram of an Intel Core 2 dual core processor, with CPU-local Level 1 caches, and a shared, on-die Level 2 cache. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... is the 305th day of the year (306th in leap years) in the Gregorian calendar. ... Year 2007 (MMVII) is the current year, a common year starting on Monday of the Gregorian calendar and the AD/CE era in the 21st century. ... An enterprise server is a computer system which performs an essential service for a large organization. ... It has been suggested that this article or section be merged into Supercomputing. ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... The Hewlett-Packard Company (NYSE: HPQ), commonly known as HP, is a very large, global company headquartered in Palo Alto, California, United States. ...

Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, with the compiler making the decisions about which instructions to execute in parallel. This approach allows the processor to execute up to six instructions per clock cycle. By contrast with other superscalar architectures, Itanium does not need elaborate hardware to keep track of instruction dependencies during parallel execution. x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... Instruction-level parallelism (ILP) is a measure of how many of the operations in a computer program can be dealt with at once. ... A diagram of the operation of a typical multi-language, multi-target compiler. ... Simple superscalar pipeline. ...

After a protracted development process, the first Itanium was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007, Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC. Intel released its newest Itanium, codenamed Montvale, in November 2007.^[1] The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... POWER is a RISC instruction set architecture designed by IBM. The name is a acronym for Performance Optimization With Enhanced RISC. POWER is also the name of a series of microprocessors that implements the instruction set architecture. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... Since many years, Intel names IC development projects after geographical names of towns, rivers or mountains near their development locations. ... This article or section does not cite any references or sources. ...

History

Itanium Server Sales forecast history.^[2][3]

Image File history File links Size of this preview: 800 × 544 pixelsFull resolution (1042 × 708 pixel, file size: 36 KB, MIME type: image/png) Graphs of various forecasts of Itanium server sales over time. ... Image File history File links Size of this preview: 800 × 544 pixelsFull resolution (1042 × 708 pixel, file size: 36 KB, MIME type: image/png) Graphs of various forecasts of Itanium server sales over time. ...

Development: 1989–2001

In 1989, HP determined that reduced instruction set computer (RISC) architectures were approaching a processing limit at one instruction per cycle. HP researchers investigated a new architecture called Explicitly Parallel Instruction Computing (EPIC) that allows the processor to execute multiple instructions in one clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, where one instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel.^[4] This article does not cite any references or sources. ... It has been suggested that this article or section be merged with Cycles Per Instruction. ... Explicitly Parallel Instruction Computing (EPIC) is a computing paradigm that began to be researched in the early 1980s resulting in a U.S. patent 4,847,755 (Gordon Morrison, et. ... In computer science, an instruction typically refers to a single operation of a processor within a computer architecture. ... A Very Long Instruction Word or VLIW CPU architecture implements a form of instruction level parallelism. ... A diagram of the operation of a typical multi-language, multi-target compiler. ...

HP determined that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so HP partnered with Intel in 1994 to develop the IA-64 architecture, which derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of the enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, codenamed Merced, in 1998.^[4] Since many years, Intel names IC development projects after geographical names of towns, rivers or mountains near their development locations. ...

During development, Intel, HP, and industry analysts were predicting that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computer (CISC) architectures for all general-purpose applications. This led to Compaq and Silicon Graphics deciding to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.^[5] A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... Compaq Computer Corporation is an American personal computer company founded in 1982, and now a brand name of Hewlett-Packard. ... Silicon Graphics, Inc. ... DEC Alpha AXP 21064 Microprocessor die photo Package for DEC Alpha AXP 21064 Microprocessor Alpha AXP 21064 bare die mounted on a business card with some statistics The DEC Alpha, also known as the Alpha AXP, is a 64-bit RISC microprocessor originally developed and fabricated by Digital Equipment Corp... A MIPS R4400 microprocessor made by Toshiba. ...

Several groups began to develop operating systems for the architecture, including Microsoft Windows, Linux, and UNIX variants such as HP-UX, Solaris, Tru64 UNIX, and Monterey/64^[6] (the latter three being canceled before reaching the market). By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of the Merced began slipping quarter by quarter.^[7] Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches. There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities. Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more unanticipated research was needed. Windows redirects here. ... This article is about operating systems that use the Linux kernel. ... Filiation of Unix and Unix-like systems Unix (officially trademarked as UNIX®, sometimes also written as or ® with small caps) is a computer operating system originally developed in 1969 by a group of AT&T employees at Bell Labs including Ken Thompson, Dennis Ritchie and Douglas McIlroy. ... HP-UX (Hewlett Packard UniX) is Hewlett-Packards proprietary implementation of the Unix operating system, based on System V (initially System III). ... Solaris is a computer operating system developed by Sun Microsystems. ... Tru64 UNIX is HPs (formerly Compaq; formerly DEC) 64-bit Unix operating system for the DEC Alpha AXP platform. ... The Project Monterey Logo Project Monterey was an attempt to build a single Unix-like operating system that ran across a variety of 32-bit and 64-bit platforms, as well as supporting multi-processing. ...

Intel announced the official name of the processor, Itanium, on October 4, 1999.^[8] Within hours observers referred to the processor as Itanic,^[9] a reference to Titanic, the "unsinkable" ocean liner which sank in 1912. Itanic has since often been used by The Register,^[10] Scott McNealy,^[11] and others.^[12][13] It alludes to the perception that Itanium is a white elephant which cost Intel and HP many billions of dollars while failing to achieve expected performance and sales in the originally projected timeframe. Meanwhile, RISC and CISC architects were making steady improvements in superscalar implementations, allowing them to break the one-instruction-per-clock barrier without using EPIC. is the 277th day of the year (278th in leap years) in the Gregorian calendar. ... This article is about the year. ... For other uses, see Titanic (disambiguation). ... This article does not cite any references or sources. ... Current logo of The Register. ... Scott McNealy holding Suns new UltraSPARC T1 processor, unveiled on November 14, 2005. ... A white elephant For other uses, see White elephant (disambiguation). ... Simple superscalar pipeline. ...

Original Itanium processor: 2001–02

Original Itanium logo

Original Itanium Central processing unit
Itanium processor
Produced:	From June 2001 to June 2002
Manufacturer:	Intel
CPU speeds:	733 MHz to 800 MHz
FSB speeds:	266 MT/s to 266 MT/s
Instruction set:	Itanium
Socket:	PAC418
Core name:	Merced

By the time Itanium was released in June, 2001, it was no longer superior to contemporaneous RISC and CISC processors. Itanium competed at the low-end (primarily 4-CPU and smaller systems) with servers based on x86 processors, and at the high end with IBM's POWER architecture and Sun Microsystems' SPARC architecture. Intel repositioned Itanium to focus on high-end business and HPC computing, attempting to duplicate x86's successful "horizontal" (i.e., single architecture, multiple systems vendors) market. Its success was limited to replacing PA-RISC and Alpha in HP systems and MIPS in SGI's HPC systems. POWER and SPARC remained strong, while the 32-bit x86 architecture grew into the enterprise space. With economies of scale fueled by its enormous installed base, x86 was the preeminent "horizontal" architecture in enterprise computing. HP and Intel recognized that Itanium was not competitive and replaced it with Itanium 2 a year later, as they had planned. Only a few thousand of the original Itaniums were sold, due to limited availability caused by poor yields, relatively poor performance, and high cost. However, these machines were useful for software development for the Itanium 2 processors that followed. IBM delivered a supercomputer based on this processor.^[14] Image File history File links Itanium. ... Image File history File links Itanium. ... CPU redirects here. ... Image File history File links Itanium. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... CPU redirects here. ... This article is about the SI unit of frequency. ... This article is about the SI unit of frequency. ... In personal computers, the front side bus (FSB) or system bus is the physical bi-directional bus that carries all electronic signal information between the central processing unit (CPU) and the northbridge. ... Megatransfer is a term used in computer technology, referring to a number of data transfers (or operations). ... Megatransfer is a term used in computer technology, referring to a number of data transfers (or operations). ... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... International Business Machines Corporation (IBM, or colloquially, Big Blue) (NYSE: IBM) (incorporated June 15, 1911, in operation since 1888) is headquartered in Armonk, New York, USA. The company manufactures and sells computer hardware, software, and services. ... POWER is a RISC instruction set architecture designed by IBM. The name is a acronym for Performance Optimization With Enhanced RISC. POWER is also the name of a series of microprocessors that implements the instruction set architecture. ... Sun Microsystems, Inc. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... It has been suggested that this article or section be merged into Supercomputing. ... PA-RISC is a microprocessor architecture developed by Hewlett-Packards Systems & VLSI Technology Operation. ... DEC Alpha AXP 21064 Microprocessor die photo Package for DEC Alpha AXP 21064 Microprocessor Alpha AXP 21064 bare die mounted on a business card with some statistics The DEC Alpha, also known as the Alpha AXP, is a 64-bit RISC microprocessor originally developed and fabricated by Digital Equipment Corp... A MIPS R4400 microprocessor made by Toshiba. ... Silicon Graphics, Inc. ... It has been suggested that this article or section be merged into Supercomputing. ...

Itanium 2 processors: 2002–present

Itanium 2 logo

The Itanium 2 was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The initial Itanium 2 was codenamed McKinley. McKinley used a 180 nm process, but it relieved many of the performance problems of the original Itanium.^[15] Image File history File links No higher resolution available. ... Image File history File links No higher resolution available. ... Since many years, Intel names IC development projects after geographical names of towns, rivers or mountains near their development locations. ...

In 2003, AMD released the Opteron, which implemented its x86-64 64-bit architecture. Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Intel responded by implementing x86-64 in its Xeon microprocessors in 2004.^[16] Intel released a new Itanium 2 family member, codenamed Madison, in 2003. Madison used a 130 nm process and was the basis of all new Itaniums until Montecito was released in June 2006. AMD redirects here. ... The Opteron is AMDs x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). ... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... This article is about the Intel microprocessor. ... Since many years, Intel names IC development projects after geographical names of towns, rivers or mountains near their development locations. ...

In March, 2005, Intel announced that it was working on a new Itanium device, codenamed Tukwila, to be released in 2007. Tukwila would have four processors and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon.^[17] Intel later said that Tukwila would be delivered in late 2008.^[18] Tukwila is the code-name for a future generation of Intels Itanium processor family following Itanium 2 and Montecito. ... The Common System Interface (or CSI) is a processor interconnect standard being developed by Intel, as a competitor to HyperTransport. ...

In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate software porting.^[19] The Alliance announced that its members would invest $10 Billion in Itanium solutions by the end of the decade.^[20]

Itanium is not a high-volume product for Intel. Intel does not release production numbers, but one industry analyst estimated that the production rate was 200,000 processors per year in 2007.^[21]

Architecture

The Intel Itanium architecture.

Intel has extensively documented the Itanium instruction set and microarchitecture,^[22] and the technical press has provided overviews.^[23][7] The architecture has been renamed several times during its history. HP called it EPIC and renamed it to PA-WideWord. Intel later called it IA-64, before settling on Intel Itanium Architecture, but it is still widely referred to as IA-64. It is a 64-bit register-rich explicitly-parallel architecture. The base data word is 64 bits, byte-addressable. The logical address space is 2⁶⁴ bytes. The architecture implements predication, speculation, and branch prediction. It uses a hardware register renaming mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture. Image File history File links Download high resolution version (1419x1064, 62 KB) Summary The Itanium architecture. ... Image File history File links Download high resolution version (1419x1064, 62 KB) Summary The Itanium architecture. ... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... Branch predication, not to be confused with branch prediction, is a strategy in computer architecture design for mitigating the costs usually associated with conditional branches, particularly branches to short sections of code. ... In computer science, speculative execution is the execution of code whose result may not actually be needed. ... In computer architecture, a branch predictor is the part of a processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. ... In computer engineering, register renaming refers to a technique used to avoid unnecessary serialization of program operations imposed by the reuse of registers by those operations. ...

The architecture implements 128 integer registers, 128 floating point registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results. In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... A floating-point number is a digital representation for a number in a certain subset of the rational numbers, and is often used to approximate an arbitrary real number on a computer. ...

Instruction execution

Each 128-bit instruction word contains three instructions, and the fetch mechanism can read up to two instruction words per clock from the L1 cache into the pipeline. When the compiler can take maximum advantage of this, the processor can execute six instructions per clock cycle. The processor has thirty functional execution units in eleven groups. Each unit can execute a particular subset of the instruction set, and each unit executes at a rate of one instruction per cycle unless execution stalls waiting for data. While not all units in a group execute identical subsets of the instruction set, common instructions can be executed in multiple units. The groups are: In computer science, an instruction typically refers to a single operation of a processor within a computer architecture. ... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ...

• Six general-purpose ALUs, two integer units, one shift unit
• Four data cache units
• Six multimedia units, two parallel shift units, one parallel multiply, one population count
• two floating-point multiply-accumulate units, two "miscellaneous" floating-point units
• three branch units

Thus, the compiler can often group instructions into sets of six that can execute at the same time. Since the floating-point units implement a multiply-accumulate operation, a single floating point instruction can perform the work of two instructions when the application requires a multiply followed by an add: this is very common in scientific processing. When it occurs, the processor can execute four FLOPs per cycle. For example, the 800Mhz Itanium had a theoretical rating of 3.2 GFLOPS and the fastest Itanium 2, at 1.67Ghz, was rated at 6.67 GFLOPS. The multiply-accumulate operation computes a product and adds it to an accumulator. ... Look up flop in Wiktionary, the free dictionary. ... For other uses, see Flop. ...

Memory architecture

From 2002 to 2006, Itanium 2 processors shared a common cache hierarchy. They had 16 KiB of Level 1 instruction cache and 16 KiB of Level 1 data cache. The L2 cache was unified (both instruction and data) and is 256 KiB. The Level 3 cache was also unified and varied in size from 1.5 MiB to 24 MiB. The 256 KiB L2 cache contains sufficient logic to handle semaphore operations without disturbing the main arithmetic logic unit (ALU). A kibibyte (a contraction of kilo binary byte) is a unit of information or computer storage, commonly abbreviated KiB (never kiB). 1 kibibyte = 210 bytes = 1,024 bytes The kibibyte is closely related to the kilobyte, which can be used either as a synonym for kibibyte or to refer to... MiB redirects here. ... This article is about the computer science application of mutual exclusion. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ...

Main memory is accessed through a bus to an off-chip chipset. The Itanium 2 bus was initially called the McKinley bus, but is now usually referred to by Intel's official name: the Scalability Port. The speed of the bus has increased steadily with new processor releases. The bus transfers 2x128 bits per clock cycle, so the 200 MHz McKinley bus transferred 6.4 GB/s and the 533 MHz Montecito bus transfers 17.056 GB/s.^{[citation needed]} In computer architecture, a bus is a subsystem that transfers data or power between computer components inside a computer or between computers and typically is controlled by device driver software. ... Diagram of a motherboard chipset A chipset is a group of integrated circuits, or chips, that are designed to work together, and are usually marketed as a single product. ...

Architectural changes

Itaniums released prior to 2006 had hardware support for the IA-32 architecture to permit support for legacy server applications, but performance was much worse in comparison with native instruction performance and contemporaneous x86 processors. In 2005 Intel developed IA-32 EL, a software emulator that provided better performance. With Montecito, Intel removed IA-32 support from the hardware. It has been suggested that this article or section be merged with X86 assembly language. ... The IA-32 Execution Layer is a software driver for Windows Server 2003 that improves performance of 32-bit applications running on 64-bit Intel Itanium-based systems. ...

With Montecito, Intel made enhancements to the architecture in July 2006.^[24] The architecture now includes hardware multithreading: each processor maintains context for two threads of execution. When one thread stalls due to a memory access the other thread gains control. Intel calls this "coarse multithreading" to distinguish it from "hyperthreading technology" that was used in some x86 and x86-64 microprocessors. Coarse multithreading is well matched to the Intel Itanium Architecture and results in an appreciable performance gain. Intel also added hardware support for virtualization. Virtualization allows a software "hypervisor" to run multiple operating system instances on the processor concurrently. Montecito also features a split L2 cache, adding a dedicated 1 MiB L2 cache for instructions and converting the original 256 KiB L2 cache to a dedicated data cache. Montecito is the code-name of a major release of Intels Itanium 2 Processor Family (IPF), which implements the IA-64 instruction set architecture on a dual-core processor. ... Hyper-Threading (HTT = Hyper Threading Technology) is Intels trademark for their implementation of the simultaneous multithreading technology on the Pentium 4 microarchitecture. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... In computing, virtualization is a broad term that refers to the abstraction of computer resources. ... In computing, a hypervisor (also: virtual machine monitor) is a virtualization platform that allows multiple operating systems to run on a host computer at the same time. ...

Hardware support

Systems

As of 2007, several manufacturers offer Itanium 2 based systems, including HP, SGI, NEC, Fujitsu, Unisys, Hitachi, and Groupe Bull. In addition, Intel offers a chassis^[25] that can be used by system integrators to build Itanium systems. HP, the only one of the industry's top four server manufacturers to offer Itanium-based systems today, manufactures at least 80% of all Itanium 2 systems. HP sold 7200 systems in the first quarter of 2006.^[26] The bulk of the sales are of enterprise servers and machines for large-scale technical computing, with an average selling price per system in excess of US$200,000. A typical system uses eight or more Itanium processors. The Hewlett-Packard Company (NYSE: HPQ), commonly known as HP, is a very large, global company headquartered in Palo Alto, California, United States. ... Compaq Computer Corporation is an American personal computer company founded in 1982, and now a brand name of Hewlett-Packard. ... This article is about the corporation Dell, Inc. ... For other uses, see IBM (disambiguation) and Big Blue. ... For the district in Saga, Japan, see Fujitsu, Saga. ... NEC Corporation (Japanese: Nippon Denki Kabushiki Gaisha; TYO: 6701 , NASDAQ: NIPNY) is a Japanese multinational IT company headquartered in Minato-ku, Tokyo, Japan. ... Silicon Graphics, Inc. ... Altix is Silicon Graphicss line of servers and supercomputers. ... It has been suggested that Hitachi Works be merged into this article or section. ... Groupe Bull (also known as Bull Computer or, informally, as Bull) is a French computer company based in Paris. ... Unisys Corporation (NYSE: UIS), based in Blue Bell, Pennsylvania, United States, and incorporated in Delaware[3], is a global provider of information technology services and solutions. ... The ES7000, is Unisyss current Intel/Windows and Linux-based server product line. ... The Hewlett-Packard Company (NYSE: HPQ), commonly known as HP, is a very large, global company headquartered in Palo Alto, California, United States. ... Silicon Graphics, Inc. ... NEC Corporation (Japanese: Nippon Denki Kabushiki Gaisha; TYO: 6701 , NASDAQ: NIPNY) is a Japanese multinational IT company headquartered in Minato-ku, Tokyo, Japan. ... For the district in Saga, Japan, see Fujitsu, Saga. ... Unisys Corporation (NYSE: UIS), based in Blue Bell, Pennsylvania, United States, and incorporated in Delaware[3], is a global provider of information technology services and solutions. ... It has been suggested that Hitachi Works be merged into this article or section. ... Groupe Bull (also known as Bull Computer or, informally, as Bull) is a French computer company based in Paris. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... A system integrator is a person or company that specializes in integrating systems. ... An enterprise server is a computer system which performs an essential service for a large organization. ... USD redirects here. ...

Chipsets

The Itanium bus interfaces to the rest of the system via a chipset. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. Currently, modern chipsets for Itanium are manufactured by HP, Fujitsu, SGI, NEC, Hitachi, and Unisys. IBM created a chipset in 2003, and Intel in 2002, but neither of them has developed chipsets to support newer technologies such as DDR2 or PCI Express.^[27] Diagram of a motherboard chipset A chipset is a group of integrated circuits, or chips, that are designed to work together, and are usually marketed as a single product. ... PCI Express (formerly known as 3GIO for 3rd Generation I/O, not to be mistaken with PCI-X) is an implementation of the PCI computer bus that uses existing PCI programming concepts and communications standards, but bases it on a much faster serial communications system. ...

Software support

In order to allow more software to run on the Itanium, Intel supported the development of effective compilers for its platform, especially its own suite of compilers.^[28][29] GCC is also able to produce machine code for Itanium.^[30][31] As of early 2007, Itanium is supported by Windows Server 2003, multiple Linux distributions (including Debian, Red Hat and Novell SuSE), and HP-UX, OpenVMS, and NonStop from HP, all natively. It also supports mainframe environment GCOS from Groupe Bull and several IA-32 operating systems via Instruction Set Simulators. Using QuickTransit, application binary software for IRIX/MIPS and Solaris/SPARC can run via "dynamic binary translation" on Linux/Itanium. According to the Itanium Solutions Alliance, as of early 2007 over 10,000 applications are available for Itanium based systems,^[32] but Sun contests this number.^[33] The ISA also supports Gelato, an Itanium HPC user group and developer community that ports and supports open source software for Itanium.^[34] The GNU Compiler Collection (usually shortened to GCC) is a set of programming language compilers produced by the GNU Project. ... Windows Server 2003 is a server operating system produced by Microsoft. ... A Linux distribution or GNU/Linux distribution (or a distro) is a Unix-like operating system plus application software comprising the Linux kernel, the GNU operating system, assorted free software and sometimes proprietary software, all created by individuals, groups or organizations from around the world. ... Debian is a free operating system. ... For other uses, see Red Hat (disambiguation). ... SUSE (properly pronounced , but often pronounced /suzi/) is a major retail Linux distribution, produced in Germany. ... HP-UX (Hewlett Packard UniX) is Hewlett-Packards proprietary implementation of the Unix operating system, based on System V (initially System III). ... OpenVMS[1] (Open Virtual Memory System or just VMS) is the name of a high-end computer server operating system that runs on the VAX[2] and Alpha[3] family of computers developed by Digital Equipment Corporation of Maynard, Massachusetts (DIGITAL was then purchased by Compaq, and is now owned... To meet Wikipedias quality standards, this article may require cleanup. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... It has been suggested that this article or section be merged with X86 assembly language. ... An Instruction Set Simulator (ISS) is a simulation model, usually coded in a high-level language, which mimics the behavior of a processor by reading instructions and maintaining internal variables which represent the processors registers. ... QuickTransit is dynamic binary translation software developed by Transitive Corporation. ... IRIX is a computer operating system developed by Silicon Graphics, Inc. ... A MIPS R4400 microprocessor made by Toshiba. ... Solaris is a computer operating system developed by Sun Microsystems. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... The Gelato Federation (usually just Gelato) is a global technical community dedicated to advancing Linux® on the Intel® Itanium® platform through collaboration, education, and leadership. ... Open source refers to projects that are open to the public and which draw on other projects that are freely available to the general public. ...

Competition

The Itanium 2 competes in the enterprise server market. Itanium's major competitors include Sun Microsystems' UltraSPARC IV+, Fujitsu's SPARC64, IBM's POWER6, AMD's Opteron, and Intel's own Xeon servers. An enterprise server is a computer system which performs an essential service for a large organization. ... Sun Microsystems, Inc. ... The UltraSPARC IV+ is a microprocessor manufactured by Sun Microsystems. ... For the district in Saga, Japan, see Fujitsu, Saga. ... For other uses, see IBM (disambiguation) and Big Blue. ... The POWER6 microprocessor is IBMs follow on to the POWER5. ... Advanced Micro Devices, Inc. ... The Opteron is AMDs x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). ... This article is about the Intel microprocessor. ...

Throughout its history, Itanium has had the best floating point performance relative to fixed-point performance of any general-purpose microprocessor. This capability is useful in HPC systems but is not needed for most enterprise server workloads.^{[citation needed]} It has been suggested that this article or section be merged into Supercomputing. ...

Supercomputers

An Itanium-based computer first appeared on list of the TOP500 supercomputers in November 2001^[14]. The best position ever achieved by an Itanium 2 based system in the list was #2, achieved in June 2004, when Thunder (LLNL) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 16.8%; in November 2007, this was 3.8%.^[35] The TOP500 project ranks and details the 500 most powerful publicly-known computer systems in the world. ... A supercomputer is a device for turning compute-bound problems into I/O-bound problems. ...

Processors

Released processors

The Itanium processors show a steady progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667MHz.

Since many years, Intel names IC development projects after geographical names of towns, rivers or mountains near their development locations. ... For other uses, see cache (disambiguation). ... For other uses, see cache (disambiguation). ... In personal computers, the front side bus (FSB) or system bus is the physical bi-directional bus that carries all electronic signal information between the central processing unit (CPU) and the northbridge. ... A die in the context of integrated circuits is a small piece of semiconducting material on which a given circuit is fabricated. ... A die in the context of integrated circuits is a small piece of semiconducting material on which a given circuit is fabricated. ... For other uses, see Watt (disambiguation). ... The 180 nanometer (180 nm or 0. ... The 180 nanometer (180 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 130 nanometer (130 nm or 0. ... The 90 nm node refers to the level of semiconductor process technology that was reached in the 2002-2003 timeframe, by most leading semiconductor companies, like Intel, Texas Instruments, IBM, and TSMC. The origin of the 90 nm value is historical, as it represents a 70% scaling every 2-3... The 90 nm node refers to the level of semiconductor process technology that was reached in the 2002-2003 timeframe, by most leading semiconductor companies, like Intel, Texas Instruments, IBM, and TSMC. The origin of the 90 nm value is historical, as it represents a 70% scaling every 2-3...

Future processors

This section contains information about scheduled or expected future computer chips. It may contain preliminary or speculative information, and may not reflect the final specification of the product.

The future of the Itanium family apparently lies in multi-core chips, based on available information about coming generations. As of June 2007, some information is known for the following: Image File history File links Gnome_globe_current_event. ... Image File history File links Nuvola_apps_kcmprocessor. ...

• Tukwila will include four cores, large on-die caches, Hyper-Threading technology and an integrated memory controller, and will implement double-device data correction, which helps to fix memory errors. Tukwila will also implement Intel QuickPath Interconnect, a new memory interface that replaces the Itanium bus. QuickPath will also be used on the Xeon Nehalem, so Tukwila can use the same chipsets as Nehalem.^[36]
• Poulson will use a 32 nm process and will feature four or more cores, multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization.^[36]

• For Kittson, few details are known other than the existence of the codename.^[36]

Tukwila is the code-name for a future generation of Intels Itanium processor family following Itanium 2 and Montecito. ... The Intel QuickPath Interconnect or simply QuickPath [1][2] (formerly Common System Interface or CSI in short) is a point-to-point processor interconnect being developed by Intel, as a competitor to HyperTransport. ... Nehalem is a codename for both, a processor microarchitecture and a processor. ... Poulson is the code-name for a future generation of Intels Itanium 2 processor family. ... The 32 nanometer (32 nm) process is the next step after the 45 nanometer process in CMOS manufacturing and fabrication. ...

Timeline

• 1989:
  • HP begins investigating EPIC^[4]
• 1994:
  • June: HP and Intel announce partnership^[37]
• 1995:
  • September: HP, Novell, and SCO announce plans for a "high volume UNIX operating system" to deliver "64-bit networked computing on the HP/Intel architecture"^[38]
• 1996:
  • October: Compaq announces it will use IA-64^[39]
• 1997:
  • June: IDC predicts IA-64 systems sales will reach $38bn/yr by 2001^[2]
  • October: Dell announces it will use IA-64^[40]
  • December: Intel and Sun announce joint effort to port Solaris to IA-64^[41]
• 1998:
  • March: SCO admits HP/SCO Unix alliance is now dead
  • June: IDC predicts IA-64 systems sales will reach $30bn/yr by 2001^[2]
  • June: Intel announces Merced will be delayed, from second half of 1999 to first half of 2000^[42]
  • September: IBM announces it will build Merced-based machines^[43]
  • October: Project Monterey is formed to create a common UNIX for IA-64
• 1999:
  • February: Project Trillian is formed to port Linux to IA-64
  • August: IDC predicts IA-64 systems sales will reach $25bn/yr by 2002^[2]
  • October: Intel Announces the Itanium name
  • October: the term Itanic is first used
• 2000:
  • February: Project Trillian delivers source code
  • June: IDC predicts Itanium systems sales will reach $25bn/yr by 2003^[2]
  • July: Sun and Intel drop Solaris-on-Itanium plans^[44]
  • August: AMD releases specification for x86-64, a set of 64-bit extensions to Intel's own x86 architecture intended to compete with IA-64. It will eventually market this under the name "AMD64"
• 2001:
  • June: IDC predicts Itanium systems sales will reach $15bn/yr by 2004^[2]
  • June: Project Monterey dies
  • July: Itanium is released
  • October: IDC predicts Itanium systems sales will reach $12bn/yr by the end of 2004^[2]
  • November: IBM's 320-processor Titan NOW Cluster at National Center for Supercomputing Applications is listed on the TOP500 list at position #34^[14]
  • November: Compaq delays Itanium Product release due to problems with processor^[45]
  • December: Gelato is formed
• 2002:
  • March: IDC predicts Itanium systems sales will reach $5bn/yr by end 2004^[2]
  • June:Itanium 2 is released
• 2003:
  • April: IDC predicts Itanium systems sales will reach $9bn/yr by end 2007^[2]
  • April: AMD releases Opteron, the first processor with x86-64 extensions
  • June: Intel releases the "Madison" Itanium 2
• 2004:
  • February: Intel announces it has been working on its own x86-64 implementation (which it will eventually market under the name "Intel 64")
  • June: Intel releases its first processor with x86-64 extensions, a Xeon processor codenamed "Nocona"
  • June: Thunder, a system at LLNL with 4096 Itanium 2 processors, is listed on the TOP500 list at position #2^[46]
  • November: Columbia, an SGI Altix 3700 with 10160 Itanium 2 processors at NASA Ames Research Center, is listed on the TOP500 list at position #2.^[47]
  • December: Itanium system sales for 2004 reach $1.4bn
• 2005:
  • January: HP ports OpenVMS to Itanium^[48]
  • February: IBM server design drops Itanium support^[49][27]
  • June: An Itanium 2 sets a record SPECfp2000 result of 2,801^[50] in a Hitachi, Ltd. Computing blade.
  • September: Itanium Solutions Alliance is formed^[51]
  • September: Dell exits the Itanium business^[52]
  • October: Itanium server sales reach $619M/quarter in the third quarter.
  • October: Intel announces one-year delays for Montecito, Montvale, and Tukwila^[18]
• 2006:
  • January: Itanium Solutions Alliance announces a $10bn collective investment in Itanium by 2010
  • February: IDC predicts Itanium systems sales will reach $6.6bn/yr by 2009^[3][53][54]
  • June: Intel releases the dual-core "Montecito" Itanium 2^[55]</