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Please help improve this article by adding citations to reliable sources. Unverifiable material may be challenged and removed. | The memory controller is a chip on a computer's motherboard or CPU die which manages the flow of data going to and from the memory. Image File history File links Question_book-3. ...
A motherboard is the central or primary circuit board making up a complex electronic system, such as a modern computer. ...
RAM redirects here. ...
Most computers based on an Intel processor have a memory controller implemented on their motherboard's north bridge, though some modern microprocessors, such as AMD's Athlon 64 and Opteron processors, IBM's POWER5, and Sun Microsystems UltraSPARC T1 have a memory controller on the CPU die to reduce the memory latency. While this has the potential to increase the system's performance, it locks the processor to a specific type (or types) of memory, forcing a redesign in order to support newer memory technologies. When DDR2 SDRAM was introduced, AMD released new Athlon 64 CPUs. These new models, with a DDR2 controller, use a different physical socket (known as Socket AM2), so that they will only fit in motherboards designed for the new type of RAM. When the memory controller is not on-die, the same CPU may be installed on a new motherboard, with an updated northbridge. Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ...
This article or section does not cite any references or sources. ...
Microprocessors, including an Intel 80486DX2 and an Intel 80386 A microprocessor (abbreviated as µP or uP) is an electronic computer central processing unit (CPU) made from miniaturized transistors and other circuit elements on a single semiconductor integrated circuit (IC) (aka microchip or just chip). ...
Advanced Micro Devices, Inc. ...
The Athlon 64 is an eighth-generation, AMD64 architecture microprocessor produced by AMD, released on September 23, 2003. ...
The Opteron is AMDs x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). ...
For other uses, see IBM (disambiguation) and Big Blue. ...
POWER5 dual-MCM POWER5 quad-MCM POWER5 is a microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. ...
Sun Microsystems, Inc. ...
Sun Microsystems UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename Niagara , is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU uses typically 72 W of power at 1. ...
In computing, memory latency is the time between initiating a request for a byte or word in memory until it is retrieved. ...
DDR2 redirects here. ...
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ...
Purpose
Memory controllers contain the logic necessary to read and write dynamic RAM, and to "refresh" the DRAM by sending current through the entire device. Without constant refreshes, DRAM will lose the data written to it as the capacitors leak their current within a number of milliseconds (64 milliseconds according to JEDEC standards). DRAM is a type of random access memory that stores each bit of data in a separate capacitor. ...
JEDEC stands for Joint Electron Device Engineering Council and is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. ...
Reading and writing to DRAM is facilitated by use of multiplexers and demultiplexers, by selecting the correct row and column address as the inputs to the multiplexer circuit, where the demultiplexer on the DRAM can select the correct memory location and return the data (once again passed through a multiplexer to reduce the number of wires necessary to assemble the system). MUX redirects here. ...
The term multiplexer has uses in several fields of application: Electronics In electronics, a multiplexer or mux is a device that combines several electrical signals into a single signal. ...
Bus width is the measure of how many parallel lanes of traffic are available to communicate with the memory cell. Memory controllers bus width ranges from 8-bit in earlier systems, to 256-bit systems in more complicated systems and video cards (typically implemented as four, 64-bit simultaneous memory controllers operating in parallel, though some are designed to operate in "gang mode" where two 64-bit memory controllers can be used to access a 128-bit memory device). 8-bit refers to the number of bits used in the data bus of a computer. ...
In computing, a 64-bit component is one in which data are processed or stored in 64-bit units (words). ...
In computer architecture, 128-bit integers, memory addresses, or other data units are those that are at most 128 bits wide. ...
Double data rate memory Double Data Rate (DDR) memory controllers are used to drive DDR SDRAM, where data is transferred on the rising and falling access of the memory clock of the system. DDR memory controllers are significantly more complicated than Single Data Rate controllers, but allow for twice the data to be transferred without increasing the clock rate or increasing the bus width to the memory cell. DDR SDRAM or double-data-rate synchronous dynamic random access memory is a type of memory integrated circuit used in computers. ...
Dual-channel memory Dual Channel memory controllers are memory controllers where the DRAM devices are separated on to two different buses to allow two memory controllers to access them in parallel. This doubles the theoretical amount of bandwidth of the bus. In theory, more channels can be built (a channel for every DRAM cell would be the ideal solution), but due to wire count, line capacitance, and the need for parallel access lines to have identical lengths, more channels are very difficult to add. Overview Dual-Channel RAM technology has been implemented and developed in the interest of addressing a lack of bandwidth for memory communication with the CPU. On motherboards where the FSB is or might not be sufficient for single-channel RAM configurations, Dual-Channel is often included to increase the efficiency...
Look up crosstalk in Wiktionary, the free dictionary. ...
Fully buffered memory Fully buffered memory systems places a memory buffer device on every memory module (called an FB-DIMM when Fully Buffered RAM is used), which unlike traditional memory controller devices, uses a serial data link to the memory controller instead of the parallel link used in previous RAM designs. This decreases the number of the wires necessary to place the memory devices on a motherboard (allowing for a smaller number of layers to be used, meaning more memory devices can be placed on a single board), at the expense of increasing latency (the time necessary to access a memory location). This increase is due to the time required to convert the parallel information read from the DRAM cell to the serial format used by the FB-DIMM controller, and back to a parallel form in the memory controller on the motherboard. In theory, the FB-DIMM's memory buffer device could be built to access any DRAM cells, allowing for memory cell agnostic memory controller design, but this has not been demonstrated, as the technology is in its infancy. Two types of DIMMs: a 168-pin SDRAM module (top) and a 184-pin DDR SDRAM module (bottom). ...
FB-DIMM Architecture Fully Buffered DIMM (or FB-DIMM) is a memory solution which can be used to increase reliability, speed and density of memory systems. ...
See also Memory scrubbing is a process in which a memory controller reads memory during idle periods and corrects single bit errors and writes the content back to the memory to prevent single bit errors adding up into non-correctable multiple bit errors. ...
External references - Selecting Memory Controllers for DSP Systems A how-to article on evaluating memory controllers using the VisualSim virtual prototyping tool.
- Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2 A detailed description of the key issues when implementing memory controllers that need to support both DDR2 and DDR3 memories. www.memcoreinc.com.
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