POWER5 is a microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The pricincipal changes are support for Simultaneous multithreading (SMT) and an on-die memory controller. Each CPU supports 2 threads; since it is a multicore chip, with 2 physical CPUs, each chip supports 4 logical threads. The POWER5 can be packaged in a DCM, with 2 chips per module, or an MCM with 4 chips per module. This work is copyrighted. ... This work is copyrighted. ... This work is copyrighted. ... This work is copyrighted. ... Microprocessors, including an Intel 80486DX2 and an Intel 80386 A microssor (abbreviated as µP or uP) is a computer electronic component made from miniaturized transistors and other circuit elements on a single semiconductor integrated circuit (IC) (aka microchip or just chip). ... International Business Machines Corporation (IBM, or colloquially, Big Blue) NYSE: IBM (incorporated June 15, 1911, in operation since 1888) is headquartered in Armonk, NY, USA. The company manufactures and sells computer hardware, software, and services. ... This article needs to be cleaned up to conform to a higher standard of quality. ... Simultaneous multithreading, often referred to as SMT, is a technique for improving the overall efficiency of the hardware that executes instructions in a computer. ... A multicore processor is a chip with more than one processing units (cores). ... DCM is a TLA which may stand for: British and Commonwealth Distinguished Conduct Medal Deputy Chief of Missions - Working directly under the Ambassador or Consular at American embassies and consulates. ... MCM stands for Multimedia Conference Manager. ...
POWER is a RISC CPU architecture designed by IBM. The name stands for Performance Optimization With Enhanced RISC. The POWER series microprocessors are used as the main CPU in many of IBMs servers, minicomputers, workstations, and supercomputers. ...
External links
Real World Technologies: Sizing up the Super Heavyweights, a comparison and analysis of the POWER5 and Montecito, that explains the major changes between the POWER4 to the POWER5, along with performance estimates
Power5 will be able to take over software tasks commonly used in the operating system such as packaging data to be sent to networks, said Ravi Arimilli, an IBM Fellow and the chief technology officer for the Power line of chips.
The Power5 and Power6 processors, to be detailed at IBM's analyst conference in Palisades, N.Y. and expected to arrive in 2004 and 2006, are the successors to the highly regarded Power4 chip at the heart of the p690 "Regatta" Unix servers.
Power5, which will be built initially with 130-nanometer (0.13 micron) features, also will feature "simultaneous multithreading," a feature that allows a single chip to act as two.
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