It has been suggested that Wafer fabrication be merged into this article or section. (Discuss)

NASA's Glenn Research Center cleanroom.

Semiconductor device fabrication is the process used to create chips, the integrated circuits that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of pure semiconducting material. Silicon is the most commonly used semiconductor material today, along with various compound semiconductors. Image File history File links Mergefrom. ... Wafer Fabrication or Wafer Fab is actually a complex procedure of many repeated sequential processes to produce complete electrical/photonic circuits, such as radio frequency (RF) amplifiers, central processing units (CPUs) for computers, LEDs and optical computer components, and much more of our electronic control circuits, to build components... Image File history File links Please see the file description page for further information. ... Image File history File links Please see the file description page for further information. ... NASAs Glenn Research Center cleanroom. ... Integrated circuit of Atmel Diopsis 740 System on Chip showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window, showing the integrated circuit inside. ... The article on electrical energy is located elsewhere. ... This article is about the engineering discipline. ... It has been suggested that Wafer prober be merged into this article or section. ... A semiconductor is a solid whose electrical conductivity is in between that of a conductor and that of an insulator, and can be controlled over a wide range, either permanently or dynamically. ... Not to be confused with Silicone. ... A Compound semiconductor is composed of elements from two or more different groups of the chemical periodic table, e. ...

The entire manufacturing process from start to packaged chips ready for shipment takes six to eight weeks and is performed in highly specialized facilities referred to as fabs. It has been suggested that this article or section be merged into Fabrication plant. ...

Wafers

A typical wafer is made out of extremely pure silicon that is grown into mono-crystalline cylindrical ingots (boules) up to 300 mm (slightly less than 12 inches) in diameter using the Czochralski process. These ingots are then sliced into wafers about 0.75 mm thick and polished to obtain a very regular and flat surface. See Wafer (cooking) for the original meaning of the word. ... Not to be confused with Silicone. ... A single crystal is a crystalline solid in which the crystal lattice of the entire sample is continuous and unbroken to the edges of the sample. ... Modern gold ingots from the Bank of Sweden An Ingot is a mass of material cast into a shape which is easy to handle. ... Silicon boule for the production of wafers. ... The Czochralski process is a method of crystal growth used to obtain single crystals of semiconductors (e. ...

Once the wafers are prepared, many process steps are necessary to produce the desired semiconductor integrated circuit. In general, the steps can be grouped into two areas:

• Front end processing
• Back end processing

Processing

In semiconductor device fabrication, the various processing steps fall into four general categories: deposition, removal, patterning, and modification of electrical properties.

• Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer. Available technologies consist of physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others.
• Removal processes are any that remove material from the wafer either in bulk or selective form and consist primarily of etch processes, both wet etching and dry etching such as reactive ion etch (RIE). Chemical-mechanical planarization (CMP) is also a removal process used between levels.
• Patterning covers the series of processes that shape or alter the existing shape of the deposited materials and is generally referred to as lithography. For example, in conventional lithography, the wafer is coated with a chemical called a “photoresist”. The photoresist is exposed by a “stepper”, a machine that focuses, aligns, and moves the mask, exposing select portions of the wafer to short wavelength light. The unexposed regions are washed away by a developer solution. After etching or other processing, the remaining photoresist is removed by plasma ashing.
• Modification of electrical properties has historically consisted of doping transistor sources and drains originally by diffusion furnaces and later by ion implantation. These doping processes are followed by furnace anneal or in advanced devices, by rapid thermal anneal (RTA) which serve to activate the implanted dopants. Modification of electrical properties now also extends to reduction of dielectric constant in low-k insulating materials via exposure to ultraviolet light in UV processing (UVP).

Many modern chips have eight or more levels produced in over 300 sequenced processing steps. Physical vapor deposition (PVD) is a technique used to deposit thin films of various materials onto various surfaces (e. ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Molecular beam epitaxy, abbreviated MBE, is the deposition of one or more pure materials onto a single crystal wafer, one layer of atoms at a time, under ultra-high vacuum, forming a perfect crystal. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... Wet etching is the removal of material by immersing the wafer in a liquid bath of chemical etchant. ... Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of Nitrogen, Chlorine and Boron Trichloride) that dislodge portions of the material from the exposed surface. ... Chemical-mechanical planarization or Chemical-mechanical polishing, commonly abbreviated CMP, is a technique used in semiconductor fabrication for planarizing the top surface of an in-process semiconductor wafer or other substrate. ... Lithography is a method for printing on a smooth surface. ... It has been suggested that this article or section be merged with resist. ... A stepper is a device used in the manufacture of integrated circuits (ICs) that is similar in operation to a slide projector or a photographic enlarger. ... In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer. ... Ion implantation is a materials engineering process by which ions of a material can be implanted into another solid, thereby changing the physical properties of the solid. ... Furnace anneal is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties. ... Rapid thermal anneal (RTA) is a process used in semiconductor device fabrication which consists of heating a single wafer at a time in order to affect its electrical properties. ...

Front End Processing

"Front End Processing" refers to the formation of the transistors directly on the silicon. The raw wafer is engineered by the growth of an ultrapure, virtually defect-free silicon layer through epitaxy. In the most advanced logic devices, prior to the silicon epitaxy step, tricks are performed to improve the performance of the transistors to be built. One method involves introducing a "straining step" wherein a silicon variant such as "silicon-germanium" (SiGe) is deposited. Once the epitaxial silicon is deposited, the crystal lattice becomes stretched somewhat, resulting in improved electronic mobility. Another method, called "silicon on insulator" technology involves the insertion of an insulating layer between the raw silicon wafer and the thin layer of subsequent silicon epitaxy. This method results in the creation of transistors with reduced parasitic effects. Assorted discrete transistors A transistor is a semiconductor device, commonly used as an amplifier or an electrically controlled switch. ... Not to be confused with Silicone. ... Epitaxy is the growth of crystals of one material on the crystal face of another (heteroepitaxy) or the same (homoepitaxy) material, such that the two materials have a defined relative structural orientation. ... SiGe stands for Silicon-Germanium heterojunction bipolar transistor and is an integrated circuit (IC) manufacturing technology. ... Silicon on insulator (SOI) is a layered structure consisting of a thin layer of silicon, from 50 nm to 100 µm, which is created on an insulating substrate, which is usually sapphire or silicon with an insulating layer of silicon dioxide(SiO2) 80 nm to 3 µm thick on its...

Silicon dioxide

Front end surface engineering is followed by: growth of the gate dielectric, traditionally silicon dioxide (SiO₂), patterning of the gate, patterning of the source and drain regions, and subsequent implantation or diffusion of dopants to obtain the desired complementary electrical properties. In memory devices, storage cells, conventionally capacitors, are also fabricated at this time, either into the silicon surface or stacked above the transistor. R-phrases R42 R43 R49 S-phrases S22 S36 S37 S45 S53 Flash point non-flammable Supplementary data page Structure and properties n, εr, etc. ... Various types of capacitors A capacitor is a device that stores energy in the electric field created between a pair of conductors on which equal but opposite electric charges have been placed. ...

Metal layers

Once the various semiconductor devices have been created they must be interconnected to form the desired electrical circuits. This "Back End Of Line" (BEOL – the latter portion of the front end of wafer fabrication, not to be confused with "back end" of chip fabrication which refers to the package and test stages) involves creating metal interconnecting wires that are isolated by insulating dielectrics. The insulating material was traditionally a form of SiO₂ or a silicate glass, but recently new low dielectric constant materials are being used. These dielectrics presently take the form of SiOC and have dielectric constants around 2.7 (compared to 3.9 for SiO₂), although materials with constants as low as 2.2 are being offered to chipmakers. Silicate glasses have been commonly used in the field of semiconductor device fabrication as an insulator between active layers of the semiconductor device. ... A Low-K dielectric is one with a small dielectric constant. ...

Interconnect

Historically, the metal wires consisted of aluminum. In this approach to wiring often called "subtractive aluminum", blanket films of aluminum are deposited first , patterned, and then etched, leaving isolated wires. Dielectric material is then deposited over the exposed wires. The various metal layers are interconnected by etching holes, called "vias," in the insulating material and depositing tungsten in them with a CVD technique. This approach is still used in the fabrication of many memory chips such as dynamic random access memory (DRAM) as the number of interconnect levels is small, currently no more than four. Aluminum is a soft and lightweight metal with a dull silvery appearance, due to a thin layer of oxidation that forms quickly when it is exposed to air. ... For other uses, see Tungsten (disambiguation). ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. ...

More recently, as the number of interconnect levels for logic has substantially increased due to the large number of transistors that are now interconnected in a modern microprocessor, the timing delay in the wiring has become significant prompting a change in wiring material from aluminum to copper and from the aforementioned silicon dioxides to newer low-K material. This performance enhancement also comes at a reduced cost via damascene processing that eliminates processing steps. In damascene processing, in contrast to subtractive aluminum technology, the dielectric material is deposited first as a blanket film and is patterned and etched leaving holes or trenches. In "single damascene" processing, copper is then deposited in the holes or trenches surrounded by a thin barrier film resulting in filled vias or wire "lines" respectively. In "dual damascene" technology, both the trench and via are fabricated before the deposition of copper resulting in formation of both the via and line simultaneously, further reducing the number of processing steps. The thin barrier film, called Copper Barrier Seed (CBS), is necessary to prevent copper diffusion into the dielectric. The ideal barrier film is effective, but is barely there. As the presence of excessive barrier film competes with the available copper wire cross section, formation of the thinnest yet continuous barrier represents one of the greatest ongoing challenges in copper processing today. A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... For other uses, see Copper (disambiguation). ...

As the number of interconnect levels increases, planarization of the previous layers is required to ensure a flat surface prior to subsequent lithography. Without it, the levels would become increasingly crooked and extend outside the depth of focus of available lithography, interfering with the ability to pattern. CMP (Chemical Mechanical Polishing) is the primary processing method to achieve such planarization although dry "etch back" is still sometimes employed if the number of interconnect levels is no more than three.

Wafer test

The highly serialized nature of wafer processing has increased the demand for metrology in between the various processing steps. Wafer test metrology equipment is used to verify that the wafers are still good and haven't been damaged by previous processing steps. If the number of dies—the integrated circuits that will eventually become chips—on a wafer that measure as fails exceeds a predetermined threshold, the wafer is scrapped rather than investing in further processing.

Device test

Once the Front End Process has been completed, the semiconductor devices are subjected to a variety of electrical tests to determine if they function properly. The proportion of devices on the wafer found to perform properly is referred to as the yield.

The fab tests the chips on the wafer with an electronic tester that presses tiny probes against the chip. The machine marks each bad chip with a drop of dye. The fab charges for test time; the prices are on the order of cents per second. Chips are often designed with “testability features” to speed testing, and reduce test costs. Wafer testing is a step performed during semiconductor device fabrication. ...

Good designs try to test and statistically manage corners: extremes of silicon behavior caused by operating temperature combined with the extremes of fab processing steps. Most designs cope with more than 64 corners.

Packaging

Once tested, the wafer is scored and then broken into individual die. Only the good, undyed chips go on to be packaged.

Plastic or ceramic packaging involves mounting the die, connecting the die pads to the pins on the package, and sealing the die. Tiny wires are used to connect pads to the pins. In the old days, wires were attached by hand, but now purpose-built machines perform the task. Traditionally, the wires to the chips were gold, leading to a “lead frame” (pronounced “leed frame”) of copper, that had been plated with solder, a mixture of tin and lead. Lead is poisonous, so lead-free “lead frames” are now the best practice.

Chip-scale package (CSP) is another packaging technology. Plastic packaged chips are usually considerably larger than the actual die, whereas CSP chips are nearly the size of the die. CSP can be constructed for each die before the wafer is diced [1].

The packaged chips are retested to ensure that they were not damaged during packaging and that the die-to-pin interconnect operation was performed correctly. A laser etches the chip’s name and numbers on the package.

List of steps

This is a list of processing techniques that are employed numerous times in a modern electronic device and do not necessarily imply a specific order.

• Wafer processing
  • Wet cleans
  • Photolithography
  • Ion implantation (in which dopants are embedded in the wafer creating regions of increased (or decreased) conductivity)
  • Dry etching
  • Wet etching
  • Plasma ashing
  • Thermal treatments
    • Rapid thermal anneal
    • Furnace anneals
    • Thermal oxidation
  • Chemical vapor deposition (CVD)
  • Physical vapor deposition (PVD)
  • Molecular beam epitaxy (MBE)
  • Electrochemical Deposition (ECD). See Electroplating
  • Chemical-mechanical planarization (CMP)
  • Wafer testing (where the electrical performance is verified)
  • Wafer backgrinding (to reduce the thickness of the wafer so the resulting chip can be put into a thin device like a smartcard or PCMCIA card.)
• Die preparation
  • Wafer mounting
  • Die cutting
• IC packaging
  • Die attachment
  • IC Bonding
    • Wire bonding
    • Flip chip
    • Tab bonding
  • IC encapsulation
    • Baking
    • Plating
    • Lasermarking
    • Trim and form
• IC testing

Photolithography is a process used in semiconductor device fabrication to transfer a pattern from a photomask (also called reticle) to the surface of a substrate. ... Ion implantation is a materials engineering process by which ions of a material can be implanted into another solid, thereby changing the physical properties of the solid. ... A dopant, also called doping agent and dope, is an impurity element added to a semiconductor lattice in low concentrations in order to alter the optical/electrical properties of the semiconductor. ... Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of Nitrogen, Chlorine and Boron Trichloride) that dislodge portions of the material from the exposed surface. ... Wet etching is the removal of material by immersing the wafer in a liquid bath of chemical etchant. ... In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer. ... Rapid thermal anneal (RTA) is a process used in semiconductor device fabrication which consists of heating a single wafer at a time in order to affect its electrical properties. ... Furnace anneal is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties. ... In microfabrication, thermal oxidation is a way to produce a thin layer of oxide (usually silicon dioxide) on the surface of a wafer (semiconductor). ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Physical vapor deposition (PVD) is a technique used to deposit thin films of various materials onto various surfaces (e. ... Molecular beam epitaxy, abbreviated MBE, is the deposition of one or more pure materials onto a single crystal wafer, one layer of atoms at a time, under ultra-high vacuum, forming a perfect crystal. ... Electroplating is the process of using Davd lloyd current to coat an electrically conductive object with a relatively thin layer of metal. ... Chemical-mechanical planarization or Chemical-mechanical polishing, commonly abbreviated CMP, is a technique used in semiconductor fabrication for planarizing the top surface of an in-process semiconductor wafer or other substrate. ... Wafer testing is a step performed during semiconductor device fabrication. ... A smart card, or integrated circuit(s) card (ICC), is defined as any integrated circuitry embedded into a flat, plastic body. ... The PCMCIA is the Personal Computer Memory Card International Association, an industry trade association that creates standards for notebook computer peripheral devices. ... Die preparation is a step of semiconductor device fabrication during which a wafer is prepared for IC packaging and IC testing. ... Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing. ... Die attachment is the step during the integrated circuit packaging phase of semiconductor device fabrication during which a die is mounted and fixed to the package. ... Wire bonding is a method of making interconnections between a microchip and the outside world as part of semiconductor device fabrication. ... A flip chip is one type of IC chip mounting which does not require any wire bonds. ... Integrated circuit encapsulation (IC encapsulation, encapsulation) is design and manufacturing of protective packages for integrated circuits. ... Plating is the general name surface-covering techniques in which a metal is deposited onto a conductive surface. ... NASAs Glenn Research Center cleanroom. ...

Hazardous materials note

Many toxic materials are used in the fabrication process. These include:

• poisonous elemental dopants such as arsenic, boron, antimony and phosphorus
• poisonous compounds like arsine, phosphine and silane
• highly reactive liquids, such as hydrogen peroxide, fuming nitric acid, sulfuric acid and hydrofluoric acid

It is vital that workers not be directly exposed to these dangerous substances. The high degree of automation common in the IC fabrication industry helps to reduce the risks of exposure of this sort. A dopant is an impurity that is added in small amounts to a pure substance to change its properties. ... General Name, Symbol, Number arsenic, As, 33 Chemical series metalloids Group, Period, Block 15, 4, p Appearance metallic gray Standard atomic weight 74. ... For other uses, see Boron (disambiguation). ... This article is about the element. ... General Name, symbol, number phosphorus, P, 15 Chemical series nonmetals Group, period, block 15, 3, p Appearance waxy white/ red/ black/ colorless Standard atomic weight 30. ... Arsine, the simplest compound of arsenic, is AsH3. ... This article is about the chemical. ... Silane is a chemical compound with chemical formula SiH4. ... R-phrases , , , , S-phrases , , , , , , , , Flash point Non-flammable Related Compounds Related compounds Water Ozone Hydrazine Except where noted otherwise, data are given for materials in their standard state (at 25 Â°C, 100 kPa) Infobox disclaimer and references Hydrogen peroxide (H2O2) is a very pale blue liquid which appears colorless in... The chemical compound nitric acid (HNO3), also known as aqua fortis and spirit of nitre, is an aqueous solution of hydrogen nitrate (anhydrous nitric acid). ... R-phrases S-phrases , , , Flash point Non-flammable Related Compounds Related strong acids Selenic acid Hydrochloric acid Nitric acid Related compounds Hydrogen sulfide Sulfurous acid Peroxymonosulfuric acid Sulfur trioxide Oleum Supplementary data page Structure and properties n, εr, etc. ... R-phrases , S-phrases , , , , Flash point nonflammable Related Compounds Other anions Hydrochloric acid Hydrobromic acid Hydroiodic acid Related compounds Hydrogen fluoride fluorosilicic acid Supplementary data page Structure and properties n, εr, etc. ...

History

When feature widths were far greater than about 10 micrometres, purity was not the issue that it is today in device manufacturing. But as the devices became more integrated the cleanrooms became even cleaner. Today, the fabs are pressurized with filtered air to remove even the smallest particles, which could come to rest on the wafers and contribute to defects. The workers in a semiconductor fabrication facility are required to wear cleanroom suits to protect the devices from human contamination. A micrometre (American spelling: micrometer, symbol µm) is an SI unit of length equal to one millionth of a metre, or about a tenth of the diameter of a droplet of mist or fog. ... NASAs Glenn Research Center cleanroom. ... Defect is the n00b of the animating world, everybody knows that he cannot and will not animate. ... This article needs to be cleaned up to conform to a higher standard of quality. ...

In an effort to increase profits, semiconductor device manufacture spread from Texas and California in the 1960s to the rest of the world, such as Ireland, Israel, Japan, Taiwan, Korea, Singapore and China, and is a global business today. For other uses, see Texas (disambiguation). ... This article is about the U.S. state. ... The 1960s decade refers to the years from 1960 to 1969. ... This article is about the Korean civilization. ...

The leading semiconductor manufacturers typically have facilities all over the world. Intel, the world's largest manufacturer, has facilities in Europe and Asia as well as the U.S. Other top manufacturers include Freescale Semiconductor (US), Samsung (Korea), Texas Instruments (US), Advanced Micro Devices (AMD) (US) see [2], Toshiba (Japan), NEC Electronics (Japan), STMicroelectronics (Europe), Infineon (Europe), Renesas (Japan), Taiwan Semiconductor Manufacturing Company (Taiwan, see TSMC web site), Sony(Japan), and NXP Semiconductors (Europe). Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Freescale sign Freescale Semiconductor, Inc. ... Samsung Group is one of the largest South Korean business groupings. ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... AMD redirects here. ... Toshiba Corporations headquarters (Center) in Hamamatsucho, Tokyo Toshiba Corporation sales by division for year ending March 31, 2005 Toshiba Corporation ) (TYO: 6502 ) is a Japanese multinational conglomerate manufacturing company, headquartered in Tokyo, Japan. ... STMicroelectronics is an international leading supplier of semiconductors. ... Infineon Technologies is a German manufacturer of integrated circuits and related products. ... Renesas Technology Corp. ... Taiwan Semiconductor Manufacturing Company, Limited (Traditional Chinese: 台灣積體電路製造股份有限公司, abbrev. ... Sony Corporation ) is a Japanese multinational corporation and one of the worlds largest media conglomerates with revenue of $66. ... For other uses of NXP, see NXP (disambiguation). ...

In 2006, there were approximately 5,000 semi-conductor and electronic components manufacturers in the United States, accounting for $165 billion, according to the 2006 U.S. Industry & Market Outlook by Barnes Reports.

See also

• Microfabrication
• Cleanrooms
• Electronic design automation
• Foundry (electronics)
• GDS-II
• OASIS
• SEMI — The semiconductor industry trade association
• Atomic layer deposition

Microfabrication is the collective term for the technologies used to fabricate components on a micrometer-sized scale. ... NASAs Glenn Research Center cleanroom. ... PCB Layout Program Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. ... It has been suggested that Pure-play semiconductor foundry be merged into this article or section. ... GDSII is a database format, which in the integrated circuit industry has been the de facto standard for IC layout data exchange for more than two decades. ... Open Artwork System Interchange Standard (OASIS (TM)) is a specification for hierarchical integrated circuit mask layout data format for interchange between EDA software, IC mask writing tools and mask inspection tools. ... Semiconductor Equipment and Materials International (SEMI) is a trade organization of manufacturers of equipment and materials used in the fabrication of semiconductor devices such as integrated circuits, transistors, diodes, and thyristors. ... To meet Wikipedias quality standards, this article or section may require cleanup. ...

External links

• Semiconductor Manufacturing - www.SiliconFarEast.com
• Intel's Animated step-by-step process
• NEC Electronics' Virtual Factory Tour
• Semiconductor Glossary
• Semiconductor materials processing
• Calculator for Silicon thermal oxidation