|
Sempron has been the marketing name used by AMD for several different entry level desktop CPUs, using several different technologies and CPU socket formats. Die of an Intel 80486DX2 microprocessor (actual size: 12Ã6. ...
Image File history File links AMD_Sempron_Processor_Logo. ...
Advanced Micro Devices, Inc. ...
Die of an Intel 80486DX2 microprocessor (actual size: 12Ã6. ...
A gigahertz is a billion hertz or a thousand megahertz, a measure of frequency. ...
A gigahertz is a billion hertz or a thousand megahertz, a measure of frequency. ...
In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and other devices within the system such as random access memory (RAM), video cards, PCI expansion cards, hard disks, the memory...
A megahertz (MHz) is one million (106) hertz, a measure of frequency. ...
A megahertz (MHz) is one million (106) hertz, a measure of frequency. ...
It has been suggested that some sections of this article be split into a new article entitled instruction set architecture. ...
x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ...
AMD64 Logo AMD64 (also x86-64 or x64) is a 64-bit microprocessor architecture and corresponding instruction set designed by Advanced Micro Devices. ...
Socket A (also known as Socket 462) is the CPU socket used for AMD flagship processors ranging from the Athlon K7 to the Athlon XP 3200+, and AMD budget processors including the Duron and Sempron. ...
Socket 754 is a CPU socket originally developed by AMD to succeed its powerful Athlon XP platform (Socket 462, also referred to as Socket A). ...
Socket 939 was introduced by AMD as an answer to Intels new platform for desktop products, Socket LGA775. ...
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ...
Wikipedia does not have an article with this exact name. ...
Wikipedia does not have an article with this exact name. ...
Advanced Micro Devices, Inc. ...
CPU can stand for: in computing: Central processing unit in journalism: Commonwealth Press Union in law enforcement: Crime prevention unit in software: Critical patch update, a type of software patch distributed by Oracle Corporation in Macleans College is often known as Ash Lim. ...
Socket 370 processor socket The term CPU socket (or CPU slot) is widely used to describe the connector linking the motherboard to the CPU(s) in certain types of desktop and server computers, particularly those compatible with the Intel x86 architecture. ...
The Sempron replaced the AMD Duron processor and competes against Intel's Celeron D processor. The AMD Duron was an x86-compatible computer processor manufactured by AMD. It was released on June 19, 2000 as a low-cost alternative to AMDs own Athlon processor and the Pentium III and Celeron processor lines from rival Intel. ...
Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ...
Celeron is a brand name given by Intel Corp. ...
AMD coined the name from the Latin semper, which means "always, everyday", to denote that the Sempron was the right processor for everyday computing [1]. History and features The first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred/Thorton core. These models were equipped with the Socket A interface, 256 KiB L2 cache, and 166 MHz Front side bus (FSB 333). Thoroughbred cores natively had 256KiB L2 cache, but Thortons had 512KiB L2 cache, half of which was disabled and could sometimes be reactivated by bridge modification. Later, AMD introduced the Sempron 3000+ CPU, based on the Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially renamed Athlon XP desktop CPUs. AMD has ceased production of all Socket A Sempron CPUs. Athlon is the brand name applied to a series of different x86 processors designed and manufactured by AMD. The original Athlon, or Athlon Classic, was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intels competing processors for a significant...
Socket A (also known as Socket 462) is the CPU socket used for AMD flagship processors ranging from the Athlon K7 to the Athlon XP 3200+, and AMD budget processors including the Duron and Sempron. ...
According to the International Electrotechnical Commission a kibibyte (a contraction of kilo binary byte) is a unit of information or computer storage. ...
In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and other devices within the system such as random access memory (RAM), video cards, PCI expansion cards, hard disks, the memory...
The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport bus, and AMD's "NX bit" feature. Socket 754 is a CPU socket originally developed by AMD to succeed its powerful Athlon XP platform (Socket 462, also referred to as Socket A). ...
The Athlon 64 is an eighth-generation, AMD64 architecture microprocessor produced by AMD, released on September 23, 2003[1]. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP[2]. The second processor (after the Opteron) to implement AMD64 architecture and the...
This article or section does not adequately cite its references or sources. ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (aka code) or for storage of data, a feature normally only found in Harvard architecture processors. ...
In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a niche market. AMD64 Logo AMD64 (also x86-64 or x64) is a 64-bit microprocessor architecture and corresponding instruction set designed by Advanced Micro Devices. ...
A niche market is a focused, targetable portion of a market sector. ...
In 2006, AMD announced the Socket AM2 line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel DDR2 SDRAM memory controller which replaces the single-channel DDR SDRAM version. The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. As of 2006, AMD sells both Socket 754 and Socket AM2 Sempron CPUs concurrently. The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ...
In electronic engineering, DDR2 SDRAM or double-data-rate two synchronous dynamic random access memory is a random access memory technology used for high speed storage of the working data of a computer or other digital electronic device. ...
DDR SDRAM or double-data-rate synchronous dynamic random access memory is a type of memory integrated circuit used in computers. ...
The Thermal Design Power (TDP) represents the maximum amount of power the thermal solution in a computer system is required to dissipate. ...
Models for Socket A Thoroughbred B/Thorton (130 nm) - L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 KiB, fullspeed
- MMX, 3DNow!, SSE
- Socket A (EV6)
- Front side bus: 166 MHz (FSB 333)
- VCore: 1.6 V
- First release: July 28, 2004
- Clockrate: 1500 MHz - 2000 MHz (2200+ to 2800+)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
Socket A (also known as Socket 462) is the CPU socket used for AMD flagship processors ranging from the Athlon K7 to the Athlon XP 3200+, and AMD budget processors including the Duron and Sempron. ...
In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and other devices within the system such as random access memory (RAM), video cards, PCI expansion cards, hard disks, the memory...
July 28 is the 209th day of the year (210th in leap years) in the Gregorian calendar. ...
shelby was here 2004 (MMIV) was a leap year starting on Thursday of the Gregorian calendar. ...
Barton (130 nm) MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
Socket A (also known as Socket 462) is the CPU socket used for AMD flagship processors ranging from the Athlon K7 to the Athlon XP 3200+, and AMD budget processors including the Duron and Sempron. ...
In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and other devices within the system such as random access memory (RAM), video cards, PCI expansion cards, hard disks, the memory...
September 17 is the 260th day of the year (261st in leap years). ...
shelby was here 2004 (MMIV) was a leap year starting on Thursday of the Gregorian calendar. ...
Models for Socket 754 Paris (130 nm SOI) - L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 KiB, fullspeed
- MMX, 3DNow!, SSE, SSE2
- Enhanced Virus Protection (NX bit)
- Integrated 72-bit(Single channel, ECC capable) DDR memory controller
- Socket 754, 800 MHz HyperTransport
- VCore: 1.4 V
- First release: July 28, 2004
- Clockrate: 1800 MHz (3100+)
- Stepping: CG (Part No.: *AX)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
SSE2, Streaming Single Instruction, Multiple Data Extensions 2, is one of the IA-32 SIMD instruction sets, first introduced by Intel with the initial version of the Pentium 4 in 2001. ...
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (aka code) or for storage of data, a feature normally only found in Harvard architecture processors. ...
Socket 754 is a CPU socket originally developed by AMD to succeed its powerful Athlon XP platform (Socket 462, also referred to as Socket A). ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
July 28 is the 209th day of the year (210th in leap years) in the Gregorian calendar. ...
shelby was here 2004 (MMIV) was a leap year starting on Thursday of the Gregorian calendar. ...
Palermo (90 nm SOI) - Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, 3DNow!, SSE, SSE2
- SSE3 support on E3 and E6 steppings
- AMD64 on E6 stepping
- Cool'n'Quiet (Sempron 3000+ and higher)
- Enhanced Virus Protection (NX bit)
- Integrated 72-bit(Single channel, ECC capable) DDR memory controller
- Socket 754, 800 MHz HyperTransport
- VCore: 1.4 V
- First release: February 2005
- Clockrate: 1400 - 2000 MHz
- 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
- 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
- Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
SSE2, Streaming Single Instruction, Multiple Data Extensions 2, is one of the IA-32 SIMD instruction sets, first introduced by Intel with the initial version of the Pentium 4 in 2001. ...
SSE3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 architecture. ...
AMD64 Logo AMD64 (also x86-64 or x64) is a 64-bit microprocessor architecture and corresponding instruction set designed by Advanced Micro Devices. ...
CoolnQuiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor series. ...
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (aka code) or for storage of data, a feature normally only found in Harvard architecture processors. ...
Socket 754 is a CPU socket originally developed by AMD to succeed its powerful Athlon XP platform (Socket 462, also referred to as Socket A). ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
Models for Socket 939 Palermo (90 nm SOI) - L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, 3DNow!, SSE, SSE2, SSE3, AMD64 (E6 Steppings Only), Cool'n'Quiet, NX bit
- Integrated 144-bit(Dual channel, ECC capable) DDR memory controller
- Socket 939, 800 MHz HyperTransport
- VCore: 1.35/1.4 V
- First release: October 2005
- Clockrate: 1800 - 2000 MHz
- 128 KiB L2-Cache (Sempron 3000+, 3400+)
- 256 KiB L2-Cache (Sempron 3200+, 3500+)
- Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
SSE2, Streaming Single Instruction, Multiple Data Extensions 2, is one of the IA-32 SIMD instruction sets, first introduced by Intel with the initial version of the Pentium 4 in 2001. ...
SSE3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 architecture. ...
AMD64 Logo AMD64 (also x86-64 or x64) is a 64-bit microprocessor architecture and corresponding instruction set designed by Advanced Micro Devices. ...
CoolnQuiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor series. ...
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (aka code) or for storage of data, a feature normally only found in Harvard architecture processors. ...
Socket 939 was introduced by AMD as an answer to Intels new platform for desktop products, Socket LGA775. ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
Models for Socket AM2 Manila (90 nm SOI) - L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
- Integrated 128-bit(Dual channel) DDR2 memory controller
- Socket AM2, 800 MHz HyperTransport
- VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
- First release: May 23, 2006
- Clockrate: 1600 - 2000 MHz
- 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
- 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+)
- Stepping: F2 (Part No.: *CN, *CW)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ...
The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...
SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...
SSE2, Streaming Single Instruction, Multiple Data Extensions 2, is one of the IA-32 SIMD instruction sets, first introduced by Intel with the initial version of the Pentium 4 in 2001. ...
SSE3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 architecture. ...
AMD64 Logo AMD64 (also x86-64 or x64) is a 64-bit microprocessor architecture and corresponding instruction set designed by Advanced Micro Devices. ...
CoolnQuiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor series. ...
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (aka code) or for storage of data, a feature normally only found in Harvard architecture processors. ...
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
May 23 is the 143rd day of the year (144th in leap years) in the Gregorian calendar. ...
For the Manfred Mann album, see 2006 (album). ...
Socket 754 32-bit Semprons | Max P-State | Model | Manufacturing Process | Part Number(OPN) | | 1600 MHz | 2600+ | 0.09 micrometre | SDA2600AIO2BA(some parts are 64-bit) | | 1600 MHz | 2800+ | 0.09 micrometre | SDA2800AIO3BA | | 1800 MHz | 3000+ | 0.13 micrometre | SDA3000AIP2AX | | 1800 MHz | 3100+ | 0.13 micrometre | SDA3100AIP3AX | | 1800 MHz | 3100+ | 0.09 micrometre | SDA3100AIO3BA | | 2000 MHz | 3300+ | 0.09 micrometre | SDA3300AIO2BA | AMD has released some Sempron processors without Cool'n'Quiet support. The following table describes those processors lacking Cool'n'Quiet. CoolnQuiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor series. ...
| Max P-State | Min P-State | Model | Operating Mode | Package-Socket | Manufacturing Process | Part Number(OPN) | | 1400 MHz | N/A | 2500+ | 32/64 | Socket 754 | 0.09 micrometre | SDA2500AIO3BX | | 1600 MHz | N/A | 2600+ | 32 or 32/64 | Socket 754 | 0.09 micrometre | SDA2600AIO2BA | | 1600 MHz | N/A | 2600+ | 32/64 | Socket 754 | 0.09 micrometre | SDA2600AIO2BX | | 1600 MHz | N/A | 2800+ | 32 | Socket 754 | 0.09 micrometre | SDA2800AIO3BA | | 1600 MHz | N/A | 2800+ | 32/64 | Socket 754 | 0.09 micrometre | SDA2800AIO3BX | | 1600 MHz | N/A | 2800+ | 32/64 | Socket AM2 | 0.09 micrometre | SDA2800IAA2CN | | 1600 MHz | N/A | 3000+ | 32/64 | Socket AM2 | 0.09 micrometre | SDA3000IAA3CN | | 1600 MHz | N/A | 3000+ | 32/64 | Socket AM2 | 0.09 micrometre | SDD3000IAA3CN | Future plans |
 | This section contains information about scheduled or expected future computer chips. It may contain preliminary or speculative information, and may not reflect the final specification of the product. | In Q2 2007, the Sempron will migrate to the 65 nm SOI process, under the code name "Sparta". These new Semprons will have the same 35 W TDP of the current "Energy Efficient SFF" Semprons. They will remain single-core. [2] Image File history File links Current_event_marker. ...
In Q4 2007, Sempron-branded implementations of the Stars microarchitecture are expected to become available, based on the Rana core. These are expected to be dual-core processors without L3 cache. Initial clock rates will be between 2.1 GHz and 2.3 GHz. The Rana Semprons will feature HyperTransport 3.0 support and will be packaged for the Socket AM2+ form factor, although they are expected to function in Socket AM2 motherboards, albeit without support for HyperTransport 3.0 enhancements.[3] The AMD K10 is AMDs next generation of processors. ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
This article or section does not adequately cite its references or sources. ...
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ...
HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ...
References 2007 (MMVII) is the current year, a common year starting on Monday of the Gregorian calendar and the AD/CE era. ...
March 16 is the 75th day of the year (76th in leap years) in the Gregorian calendar. ...
See also The Sempron is AMDs newest low-end CPU, replacing the Duron processor. ...
External links |