A transmission gate is an electronic element. It is a good non-mechanical relay, built with CMOS technology. Sometimes known as an analoggate, analogue switch or electronic relay depending on its use. It is made by the parallel combination of an nMOS and a pMOS transistor with the input at the gate of one transistor (nMOS) being complementary to the input at the gate of the other (pMOS). CMOS transmission gate drawn by Allen Timothy Chang File links The following pages link to this file: Transmission gate Categories: GFDL images | Electrical diagrams ... CMOS transmission gate drawn by Allen Timothy Chang File links The following pages link to this file: Transmission gate Categories: GFDL images | Electrical diagrams ... The field of electronics comprises the study and use of systems that operate by controlling the flow of electrons (or other charge carriers) in devices such as thermionic valves (vacuum tubes) and semiconductors. ... Automotive style miniature relay A relay is an electrical switch that opens and closes under control of another electrical circuit. ... Static CMOS Inverter Complementary-symmetry/metal-oxide semiconductor (CMOS) (see-moss, IPA:), is a major class of integrated circuits. ... Wikipedia does not yet have an article with this exact name. ... A gate is a point of entry to a space enclosed by walls, or an opening in a fence. ... The analogue (or analog) switch is an electronic component that behaves in a similar way to a relay, but has no moving parts. ... NMOS logic uses n-type metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. ... See MOSFET ...
The operation can also be understood this way: when the gate input to the nMOS transistor is '0',and the complementary '1' is gate input to the pMOS,both are turned off. However when gate input to the nMOS is '1' and its complementary '0' is the gate input to the pMOS, both are turned on and passes any signal '1' or '0' equally well without degradation.
The transmissiongates are fed by complementary clock signals to switch a selected one of the gates between a conducting state, to clock a signal through the transmissiongate and into the storage circuit associated therewith, and a nonconducting state, to inhibit a signal from coupling into the associated storage circuit.
The gate electrodes of the transmissiongates connected at the inputs of the pair of storage circuits of each memory cell are fed by a pair of complementary clock signals.
Transmissiongate MESFET 42 fully conducts current from drain to source in response to the +0.4 volt signal applied to the gate thereof by the predetermined occurrence of clock.phi..sub.2, thus coupling the data signal to source-follower MESFET 44 and charging inherent capacitances 41, 43, 45.
5 is a schematic circuit diagram of a transmissiongate switch and of a driver and receiver to illustrate the preferred embodiment of the invention.
1 is a schematic circuit diagram of a conventional transmissiongate switch 20 connected to the output of a driver 22 and the input of a receiver 24 at nodes A, B respectively.
The gate of transistor 102 is controlled by the output of a driver 104 which may include a pair of P-channel and N-channel resistors connected in parallel between node C and the gate of transistor 102.
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