Sun Microsystems' UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename "Niagara" , is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU uses typically 72 W of power at 1.2 GHz. Sun Microsystems, Inc. ... Microprocessors, including an Intel 80486DX2 and an Intel 80386. ... November 14 is the 318th day of the year (319th in leap years) in the Gregorian Calendar, with 47 days remaining. ... 2005 (MMV) was a common year starting on Saturday of the Gregorian calendar. ... A code name or cryptonym is a word or name used clandestinely to refer to another name or word. ... Many programming languages, operating systems, and other software development environments support what are called threads of execution. ... A multicore processor is a chip with more than one processing units (cores). ... CPU redirects here; for other uses, see CPU (disambiguation). ... In information technology, a server is a computer system that provides services to other computing systems—called clients—over a network. ... The watt (symbol: W) is the SI derived unit for power. ...

Sun UltraSPARC T1 (Niagara 8 Core)

The T1 is a derivative of the UltraSPARC series of microprocessors. It is Sun's first multicore processor with multithreading. The processor is available with four, six or eight CPU cores, each core able to handle four threads concurrently. Thus the processor is capable of processing up to 32 threads concurrently. Image File history File links Sun_UltraSPARC_T1. ... Image File history File links Sun_UltraSPARC_T1. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor ARChitecture) is a pure big-endian RISC microprocessor architecture originally designed in 1985 by Sun Microsystems. ... A thread in computer science is short for a thread of execution. ...

Similar to how high-end Sun SMP systems work, the UltraSPARC T1 can be partitioned. Thus, several cores can be partitioned for running a single or group of processes and/or threads, whilst the other cores deal with the rest of the processes on the system. Symmetric Multiprocessing, or SMP, is a multiprocessor computer architecture where two or more identical processors are connected to a single shared main memory. ...

Cores

The UltraSPARC T1 was designed from scratch as a multi-threaded, special-purpose processor, and thus introduces a whole new architecture for obtaining high performance. Rather than try to make each core as intelligent and optimized as they can, Sun's goal was to run as many concurrent threads as possible, and maximize utilization of each core's pipeline.

The approach appears to have worked well. Current benchmarks suggest each core in the UltraSPARC T1 is more powerful than the circa 2001, single-core, single-threaded UltraSPARC III, and executes the full SPARC v9 instruction set. An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ...

The T1's cores are less complex than those of current high end processors in order to allow 8 cores to fit on the same die. The cores do not feature out-of-order execution, or a sizable amount of cache. Single-thread processors require large caches for their performance because cache misses result in a wait while the data is fetched from main memory. By making the cache larger, the probability of a cache miss is reduced. In computer science, out-of-order execution is a paradigm used in most high-speed microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory based on memory locality feature of most computer programs. ...

The T1 cores largely side-step the issue of cache misses by multithreading. When a cache miss occurs, the core switches to another thread (assuming one is available) while the data is fetched into the cache in the background. This may make each thread slower, but the overall throughput of the core is much higher. It also means that much of the impact of cache misses is removed, and the T1 can maintain high throughput with a smaller amount of cache. The cache is no longer trying to hold the whole "working set", just the recent cache misses of each thread.

Target market

The microprocessor is unique in its abilities, and as such is targeted at a particular market. Rather than being used for high-end number-crunching and ultra-high performance applications, the chip will be targeted at network-facing high-demand servers, such as high-traffic web servers, which often utilize a large number of separate threads. One of the limitations of the UltraSPARC T1 design is that a single floating point unit is shared between all 8 cores, making the T1 unsuitable for applications performing a lot of floating point mathematics. However, since the processor's intended market does not typically make much use of floating-point operations, Sun does not expect this to be a problem. A supercomputer is a computer that leads the world in terms of processing capacity, particularly speed of calculation, at the time of its introduction. ... The term Web server can mean one of two things: A computer that is responsible for accepting HTTP requests from clients, which are known as Web browsers, and serving them Web pages, which are usually HTML documents and linked objects (images, etc. ... A floating point unit (FPU) is a part of a CPU specially designed to carry out operations on floating point numbers. ...

"Rock"

The UltraSPARC T1 is designed for single CPU systems only and is not capable of SMP. Future Sun CMT UltraSPARC processors, such as Rock, will support multiple chip server architectures. The Rock processor targets traditional data facing workloads such as databases. As such, it is seen as the logical follow-on to Sun's SMP processors such as UltraSPARC III. Rock is planned multithreading, multicore microprocessor currently in development at Sun Microsystems. ...

Rock also targets floating point workloads, unlike UltraSPARC T1. Sun has publicly disclosed a feature in the Rock processor called "Hardware Scout", which uses multithreaded hardware to perform prefetching.

Rock is not a successor to UltraSPARC T1. Sun has publicly disclosed plans for a Niagara2 processor which will target the same network facing workloads as UltraSPARC T1.

UltraSPARC T2

The UltraSPARC T2 will support eight threads per core, and each core will have its own FPU. Sun Microsystems UltraSPARC T2 microprocessor, is a multithreading, multicore CPU. The UltraSPARC T2s predecessor was the UltraSPARC T1. ...

Open-source

On March 21, 2006, Sun made the UltraSPARC T1 source code available under the GNU General Public License (GPL). The GNU logo Wikisource has original text related to this article: GNU General Public License The GNU General Public License (GNU GPL or simply GPL) is the most popular free software license, originally written by Richard Stallman for the GNU project (GNU itself is a recursive acronym for GNUs...

• Verilog source code of the UltraSPARC T1 design;
• Verification suite and simulation models;
• ISA specification (UltraSPARC Architecture 2005);
• The Solaris 10 OS simulation images.

This article or section contains information that has not been verified and thus might not be reliable. ...

External links

• Sun Microsystems' official UltraSPARC T1 Processor information
• Sun Intros Eight-Core Processor – By Jessica Davis, Electronic News, 14 Nov 2005
• OpenSPARC - Sun's opensparc homepage
• UltraSPARC T1 Project home - UltraSPARC T1 project homepage