An IBM Fellow is an appointed position at IBM made by IBM’s CEO. Typically only 4 or 5 IBM Fellows are appointed each year, at the annual Corporate Technical Recognition Event (CTRE) event in June. It is considered to be the highest honor a technologist at IBM can achieve. For other uses, see IBM (disambiguation). ... Chief Executive Officer (CEO) is the job of having the ultimate executive responsibility or authority within an organization or corporation. ...
The IBM Fellows program was founded in 1962 by Thomas J. Watson, Jr., as a way to promote creativity among the company’s “most exceptional” technical professionals. The first appointments were made in 1963. The criteria for appointment are stringent and take into account only the most significant technical achievements. In addition to a history of extraordinary accomplishments, candidates must also be considered to have the potential to make continued contributions. IBM Fellows are given broad latitude to identify and pursue projects in their area of expertise. 1962 (MCMLXII) was a common year starting on Monday (the link is to a full 1962 calendar). ... Thomas John Watson, Jr. ... 1963 (MCMLXIII) was a common year starting on Tuesday (the link is to a full 1963 calendar). ...
Since 1963, 193 IBM Fellows have been appointed. Of these, 62 are active employees (in 2006). The IBM Technical Community numbers over 195,000 people, including 440 Distinguished Engineers. 2006 (MMVI) is a common year starting on Sunday of the Gregorian calendar. ...
In 1993 an international group of six scientists, including IBMFellow Charles H. Bennett, confirmed the intuitions of the majority of science fiction writers by showing that perfect teleportation is indeed possible in principle, but only if the original is destroyed.
IBM officials said their "breakthrough" microprocessor to be built in East Fishkill plant will be competitive in performance with established high-speed commercial processors like those used in home computers, but will use less energy.
IBM's new microprocessor is designed to avoid sacrificing speed for power efficiency by integrating strained silicon and silicon-on-insulator technology into the same manufacturing process, officials said.
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